Abstract: A method and apparatus for processing video graphics utilizing less power is accomplished by providing a clock circuit that generates a clock signal. The clock signal is fed to a synchronization circuit that generates horizontal and vertical retrace. The clock signal is also provided to a look-up table DAC (digital to analog converter), or a palette DAC. While the video graphics circuit is processing data for display, the clock circuit provides the clock signal to the both the look-up table DAC and the synchronization circuit. When the data being processed is non-video data (i.e., the horizontal and vertical synchronization information), the clock circuit ceases to provide the clock signal to the look-up table DAC, which disables the look-up table DAC. Thus, it is not consuming power. The clock circuit again provides the clock signal to the look-up table DAC when the data being processed is video data (i.e., the data that is to be displayed).