Abstract: A method and apparatus are provided for controlling the execution of a software program. According to one embodiment, control flow information including multiple states associated with a software program is made accessible. Each of the states includes information indicative of desired control flow of the software program and information indicative of desired behavior of the software program. A determination is made if a current status of the software program has a predetermined relationship with an expected state of execution of the software program. Based upon the result of the determination and the information indicative of desired behavior, the software program is caused to perform an action and caused to transition from the current state to a next state. According to another embodiment, specification of a control flow architecture associated with a software program is simplified to the provision of certain control flow information that is accessible to a control flow engine.

Abstract: The invention features a computer with a condition code register file (the condition code register file is distinct from the computer's general purpose register file). The condition code register file has a plurality of addressable condition code registers. The computer executes condition-setting instructions that each produce a condition code value for storage in one of the condition code registers, and conditional branch instructions that branch to a target based on analysis of a condition code value from one of the condition code registers. The condition code registers are directly addressable by condition code address fields of the instructions.

Abstract: A computer processing system containing a plurality of identical processor elements each of which does not retain execution state information from prior operations. The plurality of identical processor elements operate on a statically compiled program which, based upon detected natural concurrencies in the basic blocks of the programs, provide logical processor numbers and an instruction firing time to each instruction in each basic block. Each processor element is capable of executing instructions on a per instruction basis such that dependent instructions can execute on the same or different processor elements. A given processor element is capable of executing an instruction from one context followed by an instruction from another context through use of shared storage resources.

Abstract: A computer processing system containing a plurality of processor elements operates on a statically compiled program which, based upon detected natural concurrencies in the basic blocks of the programs, includes intelligence regarding logical processor allocation and an instruction firing time in the instruction stream. Each processor element, in one embodiment, is context free and is capable of executing instructions on a per instruction basis so that dependent instructions can execute on the same or different processor elements. A processor element is capable of executing an instruction from one context followed by an instruction from another context through use of shared storage resources.