Patents by Inventor Gordon James

Gordon James has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240192894
    Abstract: A method includes, responsive to receiving a modified first reservation command from a storage controller, identifying, by a storage drive, a first range of storage based on a first range identifier of the modified reservation command. The method also includes granting, by the storage drive, a reservation for access to the storage drive on behalf of a first host controller by associating the reservation for the first range with a second range of storage.
    Type: Application
    Filed: February 20, 2024
    Publication date: June 13, 2024
    Inventors: GORDON JAMES COLEMAN, PETER E. KIRKPATRICK, ROLAND DREIER
  • Patent number: 12001684
    Abstract: A first amount of energy to be stored at one or more power loss protection (PLP) components is determined to enable storage of data at a plurality of storage devices of a storage system upon an occurrence of a power failure. A first voltage is provided to the one or more PLP components that corresponds to the first amount of energy. A second amount of energy to be stored at the one or more PLP components is determined based on a change in the storage system. A second voltage is provided to the one or more PLP components that corresponds to the second amount of energy.
    Type: Grant
    Filed: September 28, 2021
    Date of Patent: June 4, 2024
    Assignee: PURE STORAGE, INC.
    Inventors: Gordon James Coleman, Andrew R. Bernat, Peter E. Kirkpatrick, Mark L. McAuliffe, Eric Kelly Blanchard, Benjamin Scholbrock, Zoltan DeWitt
  • Publication number: 20240163945
    Abstract: A communication system and method for supporting a plurality of vehicle-to-everything radio access technologies (V2X RATs) is provided. The communication system configured to support multiple V2X RATs transmits, using a first V2X RAT, an indication of its availability to support an interworking function between the plurality of V2X RATs. The communication system receives an instruction to provide the interworking function between different V2X RATs. The interworking function may be incorporated in a vehicle that is joined to a platoon configured to use a first V2X RAT, and provide the interworking function between the first and a second V2X RAT. The interworking function may be used to add further vehicles to the platoon that communicate using only the second V2X RAT.
    Type: Application
    Filed: January 19, 2024
    Publication date: May 16, 2024
    Applicant: Malikie Innovations Limited
    Inventors: Nicholas James Russell, Gordon Peter Young, Stephen McCann
  • Publication number: 20240148095
    Abstract: Protective devices, such as, for example, helmets, have one or more efficient, fluid-containing shock absorbers in place of protective devices' original shock absorbing material to minimize the overall weight of the protective devices. The more efficient, fluid-containing shock absorbers yield improved impact force attenuation but occupy substantially less volume and, consequently, less weight, than the original shock absorbing material.
    Type: Application
    Filed: October 11, 2023
    Publication date: May 9, 2024
    Inventors: Nicholas James Cecchi, Hossein Vahid Alizadeh, David Benjamin Camarillo, Christoph Eduard Mack, Jeffrey Daniel Allison, Gordon Lee Avery
  • Publication number: 20240127980
    Abstract: A UO2 target for use in the manufacture of 99Mo, the target comprising: a porous matrix; wherein the matrix comprises particles of UO2 or of UO2 and CeO2 with a size of less than 7.15 ?m; and a molar ratio of 235U to Ce and 238U is less than 3%. The particles may comprise UO2 and the UO2 comprise uranium with a 235U to 238U ratio of less than 3% 235U enrichment. Also, a method of producing 99Mo, comprising: (a) irradiating such a UO2 target with thermal neutrons, with an irradiation time of between 3 and 7 days; then (b) extracting 99Mo from the target. The method includes performing steps (a) and (b) 2 or more times.
    Type: Application
    Filed: February 2, 2022
    Publication date: April 18, 2024
    Applicant: Australian Nuclear Science and Technology Organisation
    Inventors: Gordon James THOROGOOD, Robert RAPOSIO
  • Patent number: 11922070
    Abstract: A method includes, responsive to receiving a modified first reservation command from a storage controller, identifying, by a storage drive, a first range of storage based on a first range identifier of the modified reservation command. The method also includes granting, by the storage drive, a reservation for access to the storage drive on behalf of a first host controller by associating the reservation for the first range with a second range of storage.
    Type: Grant
    Filed: November 18, 2022
    Date of Patent: March 5, 2024
    Assignee: PURE STORAGE, INC.
    Inventors: Gordon James Coleman, Peter E. Kirkpatrick, Roland Dreier
  • Publication number: 20240020227
    Abstract: A storage array controller may receive a write request comprising data to be stored at one or more solid-state storage devices. A write granularity associated with the write request may be generated that is less than a logical block size associated with the storage array controller. The data associated with the write request may be segmented based on the generated write granularity. The write request may be executed to store the segmented data at the one or more solid-state storage devices.
    Type: Application
    Filed: July 27, 2023
    Publication date: January 18, 2024
    Inventors: GORDON JAMES COLEMAN, ERIC SEPPANEN
  • Patent number: 11868309
    Abstract: A priority queue including an order of local data relocation operations to be performed by a plurality of solid-state storage devices is maintained. An indication of a new local data relocation operation is received from a solid-state storage device of the plurality of solid-state storage devices for data stored at the solid-state storage device, the indication including information associated with the data. The new local data relocation operation is inserted into a position in the order of the priority queue based on the information associated with the data.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: January 9, 2024
    Assignee: PURE STORAGE, INC.
    Inventors: Sankara Vaideeswaran, Hari Kannan, Gordon James Coleman
  • Publication number: 20240004358
    Abstract: A method for generating and transmitting customized alerts regarding a status of at least one building asset of a building includes receiving, by a computing device, for at least one building asset of a building, maintenance data associated with the at least one building asset, at least one maintenance datum received from at least one sensor associated with the at least one building asset. A machine learning engine analyzes the received maintenance data to identify at least one characteristic associated with the at least one building asset. The method includes generating, for the at least one building asset, a notification associated with the at least one building asset, responsive to the identified at least one characteristic. The method includes transmitting, for the at least one building asset, to at least one user associated with the at least one building asset, at least one notification associated with the generated notification.
    Type: Application
    Filed: June 26, 2023
    Publication date: January 4, 2024
    Inventors: Josef Charles Mueller, III, Gordon James Davidson
  • Publication number: 20230418496
    Abstract: One or more performance parameters associated with data stored at a storage device of a plurality of storage devices are received by a storage controller. A first number of blocks of the storage device to a high resiliency portion and a second number of blocks of the storage device to a low resiliency portion of the storage device are allocated based on the one or more performance parameters.
    Type: Application
    Filed: September 1, 2023
    Publication date: December 28, 2023
    Inventors: HARI KANNAN, GORDON JAMES COLEMAN, YIJIE ZHAO, PETER E. KIRKPATRICK, ROBERT LEE, YUHONG MAO, BORIS FEIGIN
  • Patent number: 11846968
    Abstract: A command to relocate data is transmitted by a storage controller. The command includes first address information associated with a first set of blocks storing the data at one or more storage devices using a first programming mode and second address information associated with a second set of blocks at the one or more storage devices to store the relocated data using a second programming mode. The command causes the relocation of the data from the first set of blocks to the second set of blocks while bypassing sending the data to the storage controller. An acknowledgement is received that the relocated data has been stored at the second number of blocks.
    Type: Grant
    Filed: November 4, 2022
    Date of Patent: December 19, 2023
    Assignee: PURE STORAGE, INC.
    Inventors: Andrew R. Bernat, Peter E. Kirkpatrick, Gordon James Coleman, Wei Tang, John Roper
  • Patent number: 11847013
    Abstract: Data associated with a write request is stored at a storage device of multiple solid-state storage devices. A determination as to whether the data stored at the storage device is readable is made by determining whether a number of subsequent programming operations have been performed since the data was stored at the storage device. A notification that the stored data is readable from the storage device is generated upon determining that the data is readable.
    Type: Grant
    Filed: January 6, 2022
    Date of Patent: December 19, 2023
    Assignee: PURE STORAGE, INC.
    Inventors: Gordon James Coleman, Andrew R. Bernat, Peter E. Kirkpatrick
  • Patent number: 11847331
    Abstract: A storage unit has one or more processing devices, a solid-state drive and an open blocks cache memory. The open blocks cache memory holds open blocks of data or metadata and holds closed blocks of data or metadata pending writing to the solid-state drive. Closed blocks of data or metadata are written to the solid-state drive and open blocks of data or metadata are written to the open blocks cache memory. Values for open blocks in the open blocks cache memory are tracked. The values are adjusted in a first direction when an open block is written to the open blocks cache memory, and the values are adjusted in a second direction when an open block in the open blocks cache memory is closed and written from the open blocks cache memory to the solid-state drive.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: December 19, 2023
    Assignee: PURE STORAGE, INC.
    Inventors: Andrew R. Bernat, Wei Tang, Phillip Hord, Gordon James Coleman
  • Publication number: 20230389334
    Abstract: There is described a two-terminal multi-level memristor element synthesised from binary memristors, which is configured to implement a variable resistance based on unary or binary code words. There is further described a circuit such as a synapse circuit implemented using a multi-level memristor element.
    Type: Application
    Filed: May 25, 2023
    Publication date: November 30, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: John Paul LESSO, Gordon James BATES
  • Patent number: 11827704
    Abstract: Antibody molecules that specifically bind to PD-1 are disclosed. The anti-PD-1 antibody molecules can be used to treat, prevent and/or diagnose cancerous or infectious conditions and disorders.
    Type: Grant
    Filed: July 10, 2020
    Date of Patent: November 28, 2023
    Assignees: Novartis AG, DANA-FARBER CANCER INSTITUTE, INC., PRESIDENT AND FELLOWS OF HARVARD COLLEGE
    Inventors: Gordon James Freeman, Arlene Helen Sharpe, Walter A. Blattler, Jennifer Marie Mataraza, Catherine Anne Sabatos-Peyton, Hwai Wen Chang, Gerhard Johann Frey
  • Patent number: 11789626
    Abstract: One or more performance parameters associated with data stored at a storage device of a plurality of storage devices are received by a storage controller. A first number of blocks of the storage device to a high resiliency portion and a second number of blocks of the storage device to a low resiliency portion of the storage device are allocated based on the one or more performance parameters.
    Type: Grant
    Filed: September 28, 2022
    Date of Patent: October 17, 2023
    Assignee: PURE STORAGE, INC.
    Inventors: Hari Kannan, Gordon James Coleman, Yijie Zhao, Peter E. Kirkpatrick, Robert Lee, Yuhong Mao, Boris Feigin
  • Patent number: 11783171
    Abstract: This application relates to computing circuitry (200, 500, 600) for analogue computing. A plurality of current generators (201) are each configured to generate a defined current (ID1, ID2, . . . IDj) based on a respective input data value (D1, D2, . . . Dj). A memory array (202), having at least one set (204) of programmable-resistance memory cells (203), is arranged to receive the defined currents from each of the current generators at a respective signal line (206). Each set (204) of programmable-resistance memory cells (203) includes a memory cell associated with each signal line that, in use, can be connected between the relevant signal line and a reference voltage so as to generate a voltage on the signal line. An adder module (207) is coupled to each of the signal lines to generate a voltage at an output node (210) based on the sum of the voltages on each of the signal lines.
    Type: Grant
    Filed: August 29, 2019
    Date of Patent: October 10, 2023
    Assignee: Cirrus Logic Inc.
    Inventors: Toru Ido, David Paul Singleton, Gordon James Bates, John Anthony Breslin
  • Publication number: 20230306010
    Abstract: Characteristics associated with a device are received from the device. Firmware for the device is generated based on the received characteristics.
    Type: Application
    Filed: June 1, 2023
    Publication date: September 28, 2023
    Inventors: Gordon James Coleman, Peter E. Kirkpatrick, Eric D. Seppanen
  • Patent number: 11755894
    Abstract: This application relates to methods and apparatus for computing, especially to circuitry for performing computing, at least partly, in the analogue domain. The circuitry (200) comprises a plurality of memory cells (201), each memory cell having first and second paths between an electrode (202) for receiving an input current and respective positive and negative electrodes (203) for outputting a differential-current output. Memristors (101) are located in the first and second paths. The memory cells are configured into sets (205) of memory cells, the memory cells of each said set being connected so as to provide a differential current set output that corresponds to a combination of the cell outputs of all of the memory cells of that set. For each set, at least some of the memory cells of that set are configured to receive a different input current to other memory cells of that set.
    Type: Grant
    Filed: April 2, 2020
    Date of Patent: September 12, 2023
    Assignee: Cirrus Logic Inc.
    Inventors: Gordon James Bates, Toru Ido
  • Patent number: 11741003
    Abstract: A storage array controller may receive a write request comprising data to be stored at one or more solid-state storage devices. A write granularity associated with the write request may be generated that is less than a logical block size associated with the storage array controller. The data associated with the write request may be segmented based on the generated write granularity. The write request may be executed to store the segmented data at the one or more solid-state storage devices.
    Type: Grant
    Filed: February 10, 2022
    Date of Patent: August 29, 2023
    Assignee: PURE STORAGE, INC.
    Inventors: Gordon James Coleman, Eric Seppanen