Patents by Inventor Graeme Gordon

Graeme Gordon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11768787
    Abstract: This application relates to methods and apparatus for transfer of data between a host device (400) and a peripheral device (300) via a USB Type-C connector (100; 304) of the host device. A data controller is described that has a path controller (309, 310; 706) for establishing signal paths between circuitry of the host device and contacts (101) of said USB Type-C connector. The path controller is operable in at least first and second modes. In the first mode the path controller establishes separate signal paths to each of at least first, second, third and fourth contacts (A6, A7, B6, B7) of the USB Type-C connector and a plurality of the established signal paths are for transfer of analogue audio data. In the second mode the path controller establishes a pair of signal paths to only a subset of said first to fourth contacts to provide a differential digital data path.
    Type: Grant
    Filed: January 24, 2019
    Date of Patent: September 26, 2023
    Assignee: Cirrus Logic Inc.
    Inventors: Robert David Rand, Graeme Gordon Mackay, Andrew James Howlett
  • Patent number: 11634610
    Abstract: The present invention provides a method for covering a substrate, and includes the following operations: (a) admixing at least four different silane monomers and at least one bi-silane to a first solvent(s) to form a mixture, with the proviso that at least one of the silane monomers or the bi-silane comprises an active group capable of achieving cross-linking to adjacent siloxane polymer chains of the siloxane polymer composition; (b) subjecting the mixture to an acid treatment so that the silane monomers are at least partially hydrolysed, and the hydrolysed silane monomers, the silane monomers and the bi-silane are at least partially polymerized and cross-linked; (c) optionally changing the first solvent to a second solvent; and (d) subjecting the mixture to further cross-linking of the siloxane polymer to achieve a predetermined degree of cross-linking, depositing the siloxane polymer composition on the substrate, and optionally curing the deposited siloxane polymer composition.
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: April 25, 2023
    Assignee: OPTITUNE Oy
    Inventors: Ari Karkkainen, Milja Hannu-Kuure, Admir Hadzic, Jarkko Leivo, Henna Jarvitalo, Rauna-Leena Kuvaja, Graeme Gordon, Matti Pesonen
  • Patent number: 11617034
    Abstract: An integrated circuit for digital signal routing. Signal routing is achieved with a multiply-accumulate block, which takes data from one or more data sources and, after any required scaling, generates output data for a data destination. Data from a data source is buffered for an entire period of a data sample clock so that the multiply-accumulate block can retrieve the data at any point in the period, and output data of the multiply-accumulate block is buffered for an entire period of the data sample clock so that the data destination can retrieve the data at any point in the period. The multiply-accumulate block operates on a time division multiplexed basis, so that multiple signal paths can be processed within one period of the sample clock.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: March 28, 2023
    Assignee: Cirrus Logic, Inc.
    Inventors: Graeme Gordon Mackay, Jonathan Timothy Wigner, Gordon Richard McLeod
  • Patent number: 11438694
    Abstract: An integrated circuit for digital signal routing. Signal routing is achieved with a multiply-accumulate block, which takes data from one or more data sources and, after any required scaling, generates output data for a data destination. Data from a data source is buffered for an entire period of a data sample clock so that the multiply-accumulate block can retrieve the data at any point in the period, and output data of the multiply-accumulate block is buffered for an entire period of the data sample clock so that the data destination can retrieve the data at any point in the period. The multiply-accumulate block operates on a time division multiplexed basis, so that multiple signal paths can be processed within one period of the sample clock.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: September 6, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: Graeme Gordon Mackay, Jonathan Timothy Wigner, Gordon Richard McLeod
  • Publication number: 20220010172
    Abstract: The present invention provides a method for covering a substrate, and includes the following operations: (a) admixing at least four different silane monomers and at least one bi-silane to a first solvent(s) to form a mixture, with the proviso that at least one of the silane monomers or the bi-silane comprises an active group capable of achieving cross-linking to adjacent siloxane polymer chains of the siloxane polymer composition; (b) subjecting the mixture to an acid treatment so that the silane monomers are at least partially hydrolysed, and the hydrolysed silane monomers, the silane monomers and the bi-silane are at least partially polymerized and cross-linked; (c) optionally changing the first solvent to a second solvent; and (d) subjecting the mixture to further cross-linking of the siloxane polymer to achieve a predetermined degree of cross-linking, depositing the siloxane polymer composition on the substrate, and optionally curing the deposited siloxane polymer composition.
    Type: Application
    Filed: September 20, 2021
    Publication date: January 13, 2022
    Applicant: OPTITUNE Oy
    Inventors: Ari KARKKAINEN, Milja HANNU-KUURE, Admir HADZIC, Jarkko LEIVO, Henna JARVITALO, Rauna-Leena KUVAJA, Graeme GORDON, Matti PESONEN
  • Publication number: 20210185440
    Abstract: An integrated circuit for digital signal routing. The integrated circuit has analog and digital inputs and outputs, including digital interfaces for connection to other integrated circuits. Inputs, including the digital interfaces, act as data sources. Outputs, including the digital interfaces, act as data destinations. The integrated circuit also includes signal processing blocks, which can act as data sources and data destinations. Signal routing is achieved by means of a multiply-accumulate block, which takes data from one or more data source and, after any required scaling, generates output data for a data destination. Data from a data source is buffered for an entire period of a data sample clock so that the multiply-accumulate block can retrieve the data at any point in the period, and output data of the multiply-accumulate block is buffered for an entire period of the data sample clock so that the data destination can retrieve the data at any point in the period.
    Type: Application
    Filed: March 1, 2021
    Publication date: June 17, 2021
    Inventors: Graeme Gordon Mackay, Jonathan Timothy Wigner, Gordon Richard McLeod
  • Publication number: 20210185441
    Abstract: An integrated circuit for digital signal routing. The integrated circuit has analog and digital inputs and outputs, including digital interfaces for connection to other integrated circuits. Inputs, including the digital interfaces, act as data sources. Outputs, including the digital interfaces, act as data destinations. The integrated circuit also includes signal processing blocks, which can act as data sources and data destinations. Signal routing is achieved by means of a multiply-accumulate block, which takes data from one or more data source and, after any required scaling, generates output data for a data destination. Data from a data source is buffered for an entire period of a data sample clock so that the multiply-accumulate block can retrieve the data at any point in the period, and output data of the multiply-accumulate block is buffered for an entire period of the data sample clock so that the data destination can retrieve the data at any point in the period.
    Type: Application
    Filed: March 1, 2021
    Publication date: June 17, 2021
    Inventors: Graeme Gordon Mackay, Jonathan Timothy Wigner, Gordon Richard McLeod
  • Publication number: 20210087429
    Abstract: A layered structure comprising a substrate layer; and a layer of a siloxane polymer on the substrate layer, the layered structure being capable of being bent about a mandrel having a radius of curvature without breaking. The layer of the siloxane polymer has a thickness of 1 to 50 ?m, in particular about 5 to 20 ?m, and it is obtained by depositing on the substrate a composition comprising at least three different silane monomers, including at least one bi-silane; at least one of the silane monomers having an active group capable of achieving cross-linking to adjacent siloxane polymer; at least partially hydrolyzing the silane monomers to form siloxane polymer chains; and cross-linking the siloxane polymer chains so as to achieve a cross-linked siloxane polymer layer on the substrate.
    Type: Application
    Filed: April 8, 2019
    Publication date: March 25, 2021
    Inventors: Tiina Leppäjärvi, Milja Hannu-Kuure, Jarkko Leivo, Rauna-Leena Kuvaja, Admir Hadzic, Henna Järvitalo, Graeme Gordon, Ari Kärkkäinen
  • Publication number: 20200392368
    Abstract: The present invention relates to a process for preparing a thin film on a substrate comprising the steps of preparing two precursor compositions comprising metalloid compounds and combining them thereafter whereby one precursor composition is hydrolyzed prior to combination. The present invention is further related to a multilayer structure and an article comprising the thin film obtainable by the process, a composition comprising the precursor compositions, a kit-of-parts comprising the precursor compositions obtainable by the use of the composition and the kit-of-parts for preparing a thin film on a substrate.
    Type: Application
    Filed: February 21, 2019
    Publication date: December 17, 2020
    Applicant: BASF SE
    Inventors: Admir HADZIC, Ari KARKKAINEN, Sami PIRINEN, Milja HANNU-KUURE, Jarkko LEIVO, Rauna-Leena KUVAJA, Graeme GORDON, Toshikage ASAKURA, Neil Gregory PSCHIRER, Hiroshi YAMAMOTO
  • Patent number: 10797651
    Abstract: In accordance with embodiments of the present disclosure, a method for power supply rejection for an amplifier may include generating a correction signal by multiplying a quantity indicative of a power supply voltage of the amplifier by a transfer function defining a response from the power supply voltage of the amplifier to an output signal of the amplifier and subtracting the correction signal from a signal within a signal path of a circuit comprising the amplifier.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: October 6, 2020
    Assignee: Cirrus Logic, Inc.
    Inventors: Graeme Gordon Mackay, Lei Zhu, Ku He, Vamsikrishna Parupalli
  • Patent number: 10728654
    Abstract: An integrated circuit for digital signal routing. The integrated circuit has analog and digital inputs and outputs, including digital interfaces for connection to other integrated circuits. Inputs, including the digital interfaces, act as data sources. Outputs, including the digital interfaces, act as data destinations. The integrated circuit also includes signal processing blocks, which can act as data sources and data destinations. Signal routing is achieved by means of a multiply-accumulate block, which takes data from one or more data source and, after any required scaling, generates output data for a data destination. Data from a data source is buffered for an entire period of a data sample clock so that the multiply-accumulate block can retrieve the data at any point in the period, and output data of the multiply-accumulate block is buffered for an entire period of the data sample clock so that the data destination can retrieve the data at any point in the period.
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: July 28, 2020
    Assignee: Cirrus Logic, Inc.
    Inventors: Graeme Gordon Mackay, Jonathan Timothy Wigner, Gordon Richard McLeod
  • Patent number: 10635619
    Abstract: A distributed network system may include a shared communication bus that operates in accordance with a communication protocol and a plurality of devices coupled to the bus. In accordance with the communication protocol, when one or more of the plurality of devices is actively transmitting data on the bus, each of the plurality of devices receives data via the bus such that bidirectional communication is established among the plurality of devices via the bus, each of the plurality of devices monitors a bus state of the shared communication bus to avoid data contention and to synchronize receipt of encoded symbols and encoded messages comprising encoded symbols via the bus, and each actively transmitting device of the plurality of devices compares the bus state to a desired state of such actively transmitting device to determine a priority among actively transmitting devices of the plurality of devices with respect to the bus.
    Type: Grant
    Filed: October 12, 2016
    Date of Patent: April 28, 2020
    Assignee: Cirrus Logic, Inc.
    Inventors: Graeme Gordon Mackay, Jeffrey Allen May, Jieren Bian
  • Publication number: 20200059200
    Abstract: In accordance with embodiments of the present disclosure, a method for power supply rejection for an amplifier may include generating a correction signal by multiplying a quantity indicative of a power supply voltage of the amplifier by a transfer function defining a response from the power supply voltage of the amplifier to an output signal of the amplifier and subtracting the correction signal from a signal within a signal path of a circuit comprising the amplifier.
    Type: Application
    Filed: April 27, 2018
    Publication date: February 20, 2020
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Graeme Gordon MACKAY, Lei ZHU, Ku HE, Vamsikrishna PARUPALLI
  • Publication number: 20190220430
    Abstract: This application relates to methods and apparatus for transfer of data between a host device (400) and a peripheral device (300) via a USB Type-C connector (100; 304) of the host device. A data controller is described that has a path controller (309, 310; 706) for establishing signal paths between circuitry of the host device and contacts (101) of said USB Type-C connector. The path controller is operable in at least first and second modes. In the first mode the path controller establishes separate signal paths to each of at least first, second, third and fourth contacts (A6, A7, B6, B7) of the USB Type-C connector and a plurality of the established signal paths are for transfer of analogue audio data. In the second mode the path controller establishes a pair of signal paths to only a subset of said first to fourth contacts to provide a differential digital data path.
    Type: Application
    Filed: January 24, 2019
    Publication date: July 18, 2019
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Robert David RAND, Graeme Gordon MACKAY, Andrew James HOWLETT
  • Patent number: 10212513
    Abstract: An integrated circuit for digital signal routing. The integrated circuit has analog and digital inputs and outputs, including digital interfaces for connection to other integrated circuits. Inputs, including the digital interfaces, act as data sources. Outputs, including the digital interfaces, act as data destinations. The integrated circuit also includes signal processing blocks, which can act as data sources and data destinations. Signal routing is achieved by means of a multiply-accumulate block, which takes data from one or more data source and, after any required scaling, generates output data for a data destination. Data from a data source is buffered for an entire period of a data sample clock so that the multiply-accumulate block can retrieve the data at any point in the period, and output data of the multiply-accumulate block is buffered for an entire period of the data sample clock so that the data destination can retrieve the data at any point in the period.
    Type: Grant
    Filed: August 25, 2017
    Date of Patent: February 19, 2019
    Assignee: Cirrus Logic, Inc.
    Inventors: Graeme Gordon Mackay, Jonathan Timothy Wigner, Gordon Richard McLeod
  • Patent number: 10198386
    Abstract: This application relates to methods and apparatus for transfer of data between a host device (400) and a peripheral device (300) via a USB Type-C connector (100; 304) of the host device. A data controller is described that has a path controller (309, 310; 706) for establishing signal paths between circuitry of the host device and contacts (101) of said USB Type-C connector. The path controller is operable in at least first and second modes. In the first mode the path controller establishes separate signal paths to each of at least first, second, third and fourth contacts (A6, A7, B6, B7) of the USB Type-C connector and a plurality of the established signal paths are for transfer of analog audio data. In the second mode the path controller establishes a pair of signal paths to only a subset of said first to fourth contacts to provide a differential digital data path.
    Type: Grant
    Filed: February 24, 2016
    Date of Patent: February 5, 2019
    Assignee: Cirrus Logic, Inc.
    Inventors: Robert David Rand, Graeme Gordon MacKay, Andrew James Howlett
  • Patent number: 10164576
    Abstract: In accordance with embodiments of the present disclosure, a method for power supply rejection for an amplifier may include generating a correction signal by multiplying a quantity indicative of a power supply voltage of the amplifier by a transfer function defining a response from the power supply voltage of the amplifier to an output signal of the amplifier and subtracting the correction signal from a signal within a signal path of a circuit comprising the amplifier.
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: December 25, 2018
    Assignee: Cirrus Logic, Inc.
    Inventors: Graeme Gordon MacKay, Lei Zhu, Ku He, Vamsikrishna Parupalli
  • Publication number: 20180316313
    Abstract: In accordance with embodiments of the present disclosure, a method for power supply rejection for an amplifier may include generating a correction signal by multiplying a quantity indicative of a power supply voltage of the amplifier by a transfer function defining a response from the power supply voltage of the amplifier to an output signal of the amplifier and subtracting the correction signal from a signal within a signal path of a circuit comprising the amplifier.
    Type: Application
    Filed: April 28, 2017
    Publication date: November 1, 2018
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Graeme Gordon MACKAY, Lei ZHU, Ku HE, Vamsikrishna PARUPALLI
  • Patent number: 10037640
    Abstract: A closure lid attached to a secure storage device for storing material is provided. The closure lid attaches to a storage device that may include a container having a void for external access to the interior space. The closure lid, similarly dimensioned according to the void may be joined to the container and can be manipulated between an open or closed state by utilizing locking tabs. The closure lid may provide an airtight tight without utilizing a vacuum pump. Locking tabs may deploy and retract in the closure lid; the locking tabs may deploy and retract when a one-step operation of applying pressure to the closure lid and turning a control ring clockwise engages and disengages the locking tabs. An access control system is configured to present an input, validate user input, and permit a state change of the lock.
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: July 31, 2018
    Assignee: Sneakguard, LLC
    Inventor: Graeme Gordon
  • Publication number: 20180127180
    Abstract: A closure lid attached to a secure storage device for storing material is provided. The closure lid attaches to a storage device that may include a container having a void for external access to the interior space. The closure lid, similarly dimensioned according to the void may be joined to the container and can be manipulated between an open or closed state by utilizing locking tabs. The closure lid may provide an airtight tight without utilizing a vacuum pump. Locking tabs may deploy and retract in the closure lid; the locking tabs may deploy and retract when a one-step operation of applying pressure to the closure lid and turning a control ring clockwise engages and disengages the locking tabs. An access control system is configured to present an input, validate user input, and permit a state change of the lock.
    Type: Application
    Filed: January 3, 2018
    Publication date: May 10, 2018
    Inventor: Graeme Gordon