Patents by Inventor Greg Horner

Greg Horner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and system for detecting metal contamination on a semiconductor wafer
    Patent number: 6759255
    Abstract: A method to detect metal contamination on a semiconductor topography is provided. The semiconductor topography may include a semiconductor substrate or a dielectric material disposed upon a semiconductor substrate. The metal contamination may be driven into the semiconductor substrate by an annealing process. Alternatively, the annealing process may drive the metal contamination into the dielectric material. Subsequent to the annealing process, a charge may be deposited upon an upper surface of the semiconductor topography. An electrical property of the semiconductor topography may be measured. A characteristic of at least one type of metal contamination may be determined as a function of the electrical property of the semiconductor topography. The method may be used to determine a characteristic of one or more types of metal contamination on a portion of the semiconductor topography or the entire semiconductor topography.
    Type: Grant
    Filed: May 10, 2001
    Date of Patent: July 6, 2004
    Assignee: KLA-Tencor Technologies Corp.
    Inventors: Zhiwei Xu, Arun Srivatsa, Amin Samsavar, Thomas G Miller, Greg Horner, Steven Weinzierl
  • Method and system for detecting metal contamination on a semiconductor wafer
    Publication number: 20020090746
    Abstract: A method to detect metal contamination on a semiconductor topography is provided. The semiconductor topography may include a semiconductor substrate or a dielectric material disposed upon a semiconductor substrate. The metal contamination may be driven into the semiconductor substrate by an annealing process. Alternatively, the annealing process may drive the metal contamination into the dielectric material. Subsequent to the annealing process, a charge may be deposited upon an upper surface of the semiconductor topography. An electrical property of the semiconductor topography may be measured. A characteristic of at least one type of metal contamination may be determined as a function of the electrical property of the semiconductor topography. The method may be used to determine a characteristic of one or more types of metal contamination on a portion of the semiconductor topography or the entire semiconductor topography.
    Type: Application
    Filed: May 10, 2001
    Publication date: July 11, 2002
    Inventors: Zhiwei Xu, Arun Srivatsa, Amin Samsavar, Thomas G. Miller, Greg Horner, Steven Weinzierl