Abstract: Aspects for effectively improving the throughput in a rasterization pipeline for image rendering in a computer system are provided. A method aspect includes receiving data for a chosen number of pixels in a Z-test mechanism of the rasterization pipeline, performing Z-test determinations for the chosen number of pixels in a same clock cycle to achieve faster processing in the Z-test mechanism than other portions of the rasterization pipeline, and tagging the chosen number of pixels based upon the Z-test determinations to indicate pass/fail status for rendering.

Abstract: Aspects for increasing efficiency of memory accesses during graphics rendering are provided. A preferred method aspect includes providing a plurality of memory banks for data, and decoding input signals that indicate accessing of at least one of the plurality of memory banks for a desired plurality of words of data. The method further includes splitting data access across the plurality of memory banks to allow parallel selection of an output from at least one of the plurality of memory banks as the desired plurality of words of the data, wherein latency of data access is amortized.

Abstract: Apparatus, method, and system aspects for providing efficient accesses to memory in a computer system, the computer system including a controller, are described. Included in the aspects are a random access memory array having a plurality of rows and columns and coupled to the controller, and a column selection mechanism coupled to the memory array and the controller with the column selection mechanism being divided into predetermined portions for providing column selection signals to access chosen portions of a row in the memory array. Further included as the column selection mechanism is a multiplexer. In one embodiment, the multiplexer is divided into halves and provides separate selection signals for accessing upper word halves and lower word halves of the random access memory.