Patents by Inventor Gregory Howard Bellows

Gregory Howard Bellows has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9038079
    Abstract: A method for efficient dispatch/completion of a work element within a multi-node data processing system. The method comprises: selecting specific processing units from among the processing nodes to complete execution of a work element that has multiple individual work items that may be independently executed by different ones of the processing units; generating an allocated processor unit (APU) bit mask that identifies at least one of the processing units that has been selected; placing the work element in a first entry of a global command queue (GCQ); associating the APU mask with the work element in the GCQ; and responsive to receipt at the GCQ of work requests from each of the multiple processing nodes or the processing units, enabling only the selected specific ones of the processing nodes or the processing units to be able to retrieve work from the work element in the GCQ.
    Type: Grant
    Filed: September 15, 2012
    Date of Patent: May 19, 2015
    Assignee: International Business Machines Corporation
    Inventors: Benjamin Gale Alexander, Gregory Howard Bellows, Joaquin Madruga, Barry L. Minor
  • Patent number: 8918552
    Abstract: A system and method operable to manage misaligned direct memory access (DMA) data transfers is provided. This method involves determining a delta between N bytes of data to be copied from within a local side buffer (source location) to a remote buffer (destination location). After the delta is determined a tail of the same length is copied to temporary storage. Then the N bytes of data on the local side buffer minus the tail will be shifted to align the N bytes of data to be copied from within the local side buffer to the starting address of the destination location in the remote buffer. The pre-shifted N bytes of data within the local side buffer may be DMA transferred to the remote buffer. The tail transferred to temporary storage may then be copied from temporary storage to the remote buffer.
    Type: Grant
    Filed: October 24, 2008
    Date of Patent: December 23, 2014
    Assignee: International Business Machines Corporation
    Inventors: Gregory Howard Bellows, Jason N. Dale, Dean Joseph Burdick
  • Patent number: 8904064
    Abstract: A system and method operable to manage a message queue is provided. This management may involve out-of-order asynchronous heterogeneous remote direct memory access (RDMA) to the message queue. This system includes a pair of processing devices, a primary processing device and an additional processing device, a memory in storage location and a data bus coupled to the processing devices. The processing devices cooperate to process queue data within a shared message queue wherein when an individual processing device successfully accesses queue data the queue data is locked for the exclusive use of the processing device. When the processing device acquires the queue data, the queue data is locked and the queue data acquired by the acquiring processing device includes the queue data for both the primary processing device and additional processing device such that the processing device has all queue data necessary to process the data and return processed queue data.
    Type: Grant
    Filed: October 24, 2008
    Date of Patent: December 2, 2014
    Assignee: International Business Machines Corporation
    Inventors: Gregory Howard Bellows, Jason N. Dale
  • Patent number: 8893145
    Abstract: A method efficiently dispatches completes a work element within a multi-node, data processing system that has a global command queue (GCQ) and at least one high latency node. The method comprises: at the high latency processor node, work scheduling logic establishing a local command/work queue (LCQ) in which multiple work items for execution by local processing units can be staged prior to execution; a first local processing unit retrieving via a work request a larger chunk size of work than can be completed in a normal work completion execution cycle by the local processing unit; storing the larger chunk size of work retrieved in a local command/work queue (LCQ); enabling the first local processing unit to locally schedule and complete portions of the work stored within the LCQ; and transmitting a next work request to the GCQ only when all the work within the LCQ has been dispatched by the local processing units.
    Type: Grant
    Filed: September 15, 2012
    Date of Patent: November 18, 2014
    Assignee: International Business Machines Corporation
    Inventors: Benjamin Gale Alexander, Gregory Howard Bellows, Joaquin Madruga, Barry L. Minor
  • Patent number: 8516461
    Abstract: A method provides efficient dispatch/completion of an N Dimensional (ND) Range command in a data processing system (DPS). The method comprises: a compiler generating one or more commands from received program instructions; ND Range work processing (WP) logic determining when a command generated by the compiler will be implemented over an ND configuration of operands, where N is greater than one (1); automatically decomposing the ND configuration of operands into a one (1) dimension (1D) work element comprising P sequentially ordered work items that each represent one of the operands; placing the 1D work element within a command queue of the DPS; enabling sequential dispatching of 1D work items in ordered sequence from to one or more processing units; and generating an ND Range output by mapping the 1D work output result to an ND position corresponding to an original location of the operand represented by the 1D work item.
    Type: Grant
    Filed: September 15, 2012
    Date of Patent: August 20, 2013
    Assignee: International Business Machines Corporation
    Inventors: Gregory Howard Bellows, Brian H. Horton, Joaquin Madruga, Barry L. Minor
  • Publication number: 20100106948
    Abstract: A system and method operable to manage a message queue is provided. This management may involve out-of-order asynchronous heterogeneous remote direct memory access (RDMA) to the message queue. This system includes a pair of processing devices, a primary processing device and an additional processing device, a memory in storage location and a data bus coupled to the processing devices. The processing devices cooperate to process queue data within a shared message queue wherein when an individual processing device successfully accesses queue data the queue data is locked for the exclusive use of the processing device. When the processing device acquires the queue data, the queue data is locked and the queue data acquired by the acquiring processing device includes the queue data for both the primary processing device and additional processing device such that the processing device has all queue data necessary to process the data and return processed queue data.
    Type: Application
    Filed: October 24, 2008
    Publication date: April 29, 2010
    Inventors: Gregory Howard Bellows, Jason N. Dale
  • Publication number: 20100106880
    Abstract: A system and method operable to manage misaligned direct memory access (DMA) data transfers is provided. This method involves determining a delta between N bytes of data to be copied from within a local side buffer (source location) to a remote buffer (destination location). After the delta is determined a tail of the same length is copied to temporary storage. Then the N bytes of data on the local side buffer minus the tail will be shifted to align the N bytes of data to be copied from within the local side buffer to the starting address of the destination location in the remote buffer. The pre-shifted N bytes of data within the local side buffer may be DMA transferred to the remote buffer.
    Type: Application
    Filed: October 24, 2008
    Publication date: April 29, 2010
    Inventors: Gregory Howard Bellows, Jason N. Dale, Dean Joseph Burdick