Patents by Inventor Gregory J. Kearns
Gregory J. Kearns has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230175162Abstract: The embodiments herein relate to apparatuses and methods for electroplating one or more materials onto a substrate. Embodiments herein utilize a cross flow conduit in the electroplating cell to divert flow of fluid from a region between a substrate and a channeled ionically resistive plate positioned near the substrate down to a level lower than level of fluid in a fluid containment unit for collecting overflow fluid from the plating system for recirculation. The cross flow conduit can include channels cut into components of the plating cell to allow diverted flow, or can include an attachable diversion device mountable to an existing plating cell to divert flow downwards to the fluid containment unit. Embodiments also include a flow restrictor which may be a plate or a pressure relief valve for modulating flow of fluid in the cross flow conduit during plating.Type: ApplicationFiled: January 17, 2023Publication date: June 8, 2023Inventors: Stephen J. Banik, II, Aaron Berke, Gabriel Hay Graham, Gregory J. Kearns, Lee Peng Chua, Bryan L. Buckalew
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Patent number: 11585007Abstract: The embodiments herein relate to apparatuses and methods for electroplating one or more materials onto a substrate. Embodiments herein utilize a cross flow conduit in the electroplating cell to divert flow of fluid from a region between a substrate and a channeled ionically resistive plate positioned near the substrate down to a level lower than level of fluid in a fluid containment unit for collecting overflow fluid from the plating system for recirculation. The cross flow conduit can include channels cut into components of the plating cell to allow diverted flow, or can include an attachable diversion device mountable to an existing plating cell to divert flow downwards to the fluid containment unit. Embodiments also include a flow restrictor which may be a plate or a pressure relief valve for modulating flow of fluid in the cross flow conduit during plating.Type: GrantFiled: November 15, 2019Date of Patent: February 21, 2023Assignee: Lam Research CorporationInventors: Stephen J. Banik, II, Aaron Berke, Gabriel Hay Graham, Gregory J. Kearns, Lee Peng Chua, Bryan L. Buckalew
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Publication number: 20220396894Abstract: Undesired deposition of metals on a lipseal (lipseal plate-out) during electrodeposition of metals on semiconductor substrates is minimized or eliminated by minimizing or eliminating ionic current directed at a lipseal. For example, electrodeposition can be conducted such as to avoid contact of a lipseal with a cathodically biased conductive material on the semiconductor substrate during the course of electroplating. This can be accomplished by shielding a small selected zone proximate the lipseal to suppress electrode-position of metal proximate the lipseal, and to avoid contact of metal with a lipseal. In some embodiments shielding is accomplished by sequentially using lipseals of different inner diameters during electroplating of metals into through-resist features, where a lipseal having a smaller diameter is used during a first electroplating step and serves as a shield blocking electrodeposition in a selected zone. In a second electroplating step, a lipseal of a larger inner diameter is used.Type: ApplicationFiled: September 30, 2020Publication date: December 15, 2022Inventors: Gregory J. Kearns, Lee Peng Chua, Jacob Kurtis Blickensderfer, Steven T. Mayer
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Publication number: 20210395913Abstract: The embodiments herein relate to apparatuses and methods for electroplating one or more materials onto a substrate. Embodiments herein utilize a cross flow conduit in the electroplating cell to divert flow of fluid from a region between a substrate and a channeled ionically resistive plate positioned near the substrate down to a level lower than level of fluid in a fluid containment unit for collecting overflow fluid from the plating system for recirculation. The cross flow conduit can include channels cut into components of the plating cell to allow diverted flow, or can include an attachable diversion device mountable to an existing plating cell to divert flow downwards to the fluid containment unit. Embodiments also include a flow restrictor which may be a plate or a pressure relief valve for modulating flow of fluid in the cross flow conduit during plating.Type: ApplicationFiled: November 15, 2019Publication date: December 23, 2021Applicant: Lam Research CorporationInventors: Stephen J. Banik, II, Aaron Berke, Gabriel Hay Graham, Gregory J. Kearns, Lee Peng Chua, Bryan L. Buckalew
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Publication number: 20180274123Abstract: An apparatus for automatically generating a metal-containing electrolyte (e.g., an electrolyte containing Sn2+ ions and an acid) includes an anolyte chamber configured to house an active anode (e.g., a metallic tin anode), an anolyte, and a sensor (e.g., one or more sensors) measuring a concentration of metal ions in the anolyte; a catholyte chamber configured to house a hydrogen-generating cathode and a catholyte; and a controller having program instructions for processing data from the sensor and for automatically generating an electrolyte having metal ions in a target concentration range in the anolyte chamber. In some embodiments, the apparatus is in communication with an electroplating apparatus and is capable to deliver the generated electrolyte to the electroplating apparatus on demand. In some embodiments, a densitometer and a conductivity meter are together used as sensors, and the apparatus is configured to generate low alpha tin electrolyte containing an acid.Type: ApplicationFiled: May 25, 2018Publication date: September 27, 2018Inventors: Steven T. Mayer, Gregory J. Kearns, Richard G. Abraham, Lawrence Ossowski
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Patent number: 8212225Abstract: Silicon grids with electron-transparent SiO2 windows for use as substrates for high-resolution transmission electron microscopy of chemically-modified SiO2 surfaces are fabricated by forming an oxide layer on a silicon substrate. An aperture is defined in the silicon substrate by etching the substrate to the oxide layer. A single substrate can include a plurality of apertures that are in respective frame regions that are defined by one or more channels in the substrate. Structural or chemical functionalizations can be provided, and surface interactions observed via TEM.Type: GrantFiled: May 19, 2008Date of Patent: July 3, 2012Assignee: State of Oregon acting by and through the State Board of Higher Education on behalf of the University of OregonInventors: James E. Hutchison, Gregory J. Kearns
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Patent number: 7763317Abstract: Surface preparation of a compound semiconductor surface, such as indium antimonide (InSb), with a triflating agent, such as triflic anhydride or a trifluoroacetylating agent, such as trifluoroacetic anhydride is described. In one embodiment, the triflating or trifluoroacetylating passivates the compound semiconductor surface by terminating the surface with triflate trifluoroacetate groups. In a further embodiment, a triflating agent or trifluoroacetylating agent is employed to first convert a thin native oxide present on a compound semiconductor surface to a soluble species. In another embodiment, the passivated compound semiconductor surface is activated in an ALD chamber by reacting the triflate or trifluoroacetate protecting groups with a protic source, such as water (H2O). Metalorganic precursors are then introduced in the ALD chamber to form a good quality interfacial layer, such as aluminum oxide (Al2O3), on the compound semiconductor surface.Type: GrantFiled: March 30, 2007Date of Patent: July 27, 2010Assignee: Intel CorporationInventors: James M. Blackwell, Willy Rachmady, Gregory J. Kearns, Darryl J. Morrison
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Publication number: 20100155620Abstract: Silicon grids with electron-transparent SiO2 windows for use as substrates for high-resolution transmission electron microscopy of chemically-modified SiO2 surfaces are fabricated by forming an oxide layer on a silicon substrate. An aperture is defined in the silicon substrate by etching the substrate to the oxide layer. A single substrate can include a plurality of apertures that are in respective frame regions that are defined by one or more channels in the substrate. Structural or chemical functionalizations can be provided, and surface interactions observed via TEM.Type: ApplicationFiled: May 19, 2008Publication date: June 24, 2010Inventors: James E. Hutchison, Gregory J. Kearns
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Publication number: 20090104435Abstract: Disclosed is a method for the chemical modification of surfaces to form patterned nanoparticle arrays on the surfaces. Methods of producing arrays in predetermined patterns and electronic devices that incorporate such patterned arrays are also described.Type: ApplicationFiled: May 12, 2006Publication date: April 23, 2009Applicant: STATE OF OREGON ACTING BY AND THROUGH THE STATE BOInventors: James E. Hutchison, Christina E. Inman, Gregory J. Kearns, Evan W. Foster
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Publication number: 20080280099Abstract: Silicon grids with electron-transparent SiO2 windows for use as substrates for high-resolution transmission electron microscopy of chemically-modified SiO2 surfaces are fabricated by forming an oxide layer on a silicon substrate. An aperture is defined in the silicon substrate by etching the substrate to the oxide layer. A single substrate can include a plurality of apertures that are in respective frame regions that are defined by one or more channels in the substrate. Tabs are provided to secure the frame regions to the substrate, and the tabs are readily broken to obtain a particular frame region. Conductive or other features can be defined on the oxide layers prior to separation of the frame regions from the substrate.Type: ApplicationFiled: May 23, 2006Publication date: November 13, 2008Inventors: James E. Hutchison, Gregory J. Kearns
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Publication number: 20080241423Abstract: Surface preparation of a compound semiconductor surface, such as indium antimonide (InSb), with a triflating agent, such as triflic anhydride or a trifluoroacetylating agent, such as trifluoroacetic anhydride is described. In one embodiment, the triflating or trifluoroacetylating passivates the compound semiconductor surface by terminating the surface with triflate trifluoroacetate groups. In a further embodiment, a triflating agent or trifluoroacetylating agent is employed to first convert a thin native oxide present on a compound semiconductor surface to a soluble species. In another embodiment, the passivated compound semiconductor surface is activated in an ALD chamber by reacting the triflate or trifluoroacetate protecting groups with a protic source, such as water (H2O). Metalorganic precursors are then introduced in the ALD chamber to form a good quality interfacial layer, such as aluminum oxide (Al2O3), on the compound semiconductor surface.Type: ApplicationFiled: March 30, 2007Publication date: October 2, 2008Inventors: James M. Blackwell, Willy Rachmady, Gregory J. Kearns, Darryl J. Morrison