Abstract: A multi-stage amplifier is coupled with a power detector. The multi-stage amplifier includes a plurality of amplifier stages in series, with a signal path extending through them. The power detector is coupled to an interior node of the amplifier along the signal path, and is operable to sample a first signal being transmitted on the signal path. The power detector outputs a second signal reflective of a power of the first signal. In one embodiment, the interior node is in a matching network of the amplifier disposed between a first amplifier stage and a final amplifier stage of the amplifier. The second signal may be used in a feedback network to adjust an amount of amplification of the first signal by the amplifier.

Abstract: A multi-stage amplifier is coupled with a power detector. The multi-stage amplifier includes a plurality of amplifier stages in series, with a signal path extending through them. The power detector is coupled to an interior node of the amplifier along the signal path, and is operable to sample a first signal being transmitted on the signal path. The power detector outputs a second signal reflective of a power of the first signal. In one embodiment, the interior node is in a matching network of the amplifier disposed between a first amplifier stage and a final amplifier stage of the amplifier. The second signal may be used in a feedback network to adjust an amount of amplification of the first signal by the amplifier.

Abstract: A multi-stage amplifier is coupled with a power detector. The multi-stage amplifier includes a plurality of amplifier stages in series, with a signal path extending through them. The power detector is coupled to an interior node of the amplifier along the signal path, and is operable to sample a first signal being transmitted on the signal path. The power detector outputs a second signal reflective of a power of the first signal. In one embodiment, the interior node is in a matching network of the amplifier disposed between a first amplifier stage and a final amplifier stage of the amplifier. The second signal may be used in a feedback network to adjust an amount of amplification of the first signal by the amplifier.

Abstract: A multi-stage amplifier is coupled with a power detector. The multi-stage amplifier includes a plurality of amplifier stages in series, with a signal path extending through them. The power detector is coupled to an interior node of the amplifier along the signal path, and is operable to sample a first signal being transmitted on the signal path. The power detector outputs a second signal reflective of a power of the first signal. In one embodiment, the interior node is in a matching network of the amplifier disposed between a first amplifier stage and a final amplifier stage of the amplifier. The second signal may be used in a feedback network to adjust an amount of amplification of the first signal by the amplifier.

Abstract: An automatic-bias amplifier circuit includes an amplifier having an input, an output, and a signal path between the input and output. A power detector is coupled for sampling the power of a signal passed on the signal path. The point of coupling may be the output and/or at one or more internal nodes of the amplifier. The power detector outputs an analog voltage signal reflective of the power of the signal to a bias circuit. The bias circuit causes the amplifier to draw a quiescent current, from a fixed level DC power supply, that varies in proportion to the analog voltage signal. Accordingly, the power consumption of the amplifier is optimized for all output power levels of the amplifier, while maintaining a desired degree of linearity. The automatic-bias amplifier circuit may be used in a wireless radio frequency communications device, e.g., a cellular phone.

Abstract: An amplifier and a bias circuit are disclosed. The bias circuit receives an analog voltage signal that reflects a desired output power level of the amplifier. The bias circuit causes the amplifier to draw a quiescent current, from a fixed-level DC voltage supply, that varies proportionally with the analog voltage signal. In this way, the current consumption of the amplifier is optimized for the desired output power level, while maintaining a desired, high degree of linearity. The amplifier and bias circuit may be in a wireless communications device that includes a baseband processor. The baseband processor generates the analog voltage signal, and a data signal that is converted to a RF signal. The RF signal is amplified by a preamplifier to a power level determined by the analog voltage signal. The RF signal is output to the amplifier for further amplification, and subsequently is broadcast through an antenna.

Abstract: A solid state, quantum mechanical electron/hole wave device in the form of a switch or multiplexor includes a layer of semiconductor material supporting substantially ballistic electron/hole transport and a periodic grating structure formed in the layer of semiconductor material, with the grating structure comprising a modulation in electron/hole potential energy and/or effective mass. Preferably, means are provided for applying and varying the grating modulation. By constructing the device to divide the input substantially completely into two output beams (to operate in the Bragg regime), a useful switch is provided. Likewise, by constructing the device to divide the input into a selected number of three or more output beams (to operate in the Raman-Nath regime), a useful multiplexor is provided.