Patents by Inventor Gregory U'Ren

Gregory U'Ren has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230361102
    Abstract: A semiconductor structure includes a semiconductor wafer having one or more semiconductor devices and an inductor attached to an upper surface of said semiconductor wafer. The semiconductor structure further includes a redistribution layer electrically connecting the inductor to at least one of said one or more semiconductor devices.
    Type: Application
    Filed: May 3, 2023
    Publication date: November 9, 2023
    Inventors: Frederic DRILLET, Imene LAHBIB, Gregory U'REN
  • Patent number: 11610916
    Abstract: A semiconductor structure for RF applications comprises: a first ?TP GaN transistor on an SOI wafer or die; and a first resistor connected to the gate of said first transistor.
    Type: Grant
    Filed: May 5, 2020
    Date of Patent: March 21, 2023
    Assignee: X-FAB France SAS
    Inventors: Imène Lahbib, Jérôme Loraine, Frédéric Drillet, Albert Kumar, Gregory U'ren
  • Publication number: 20220415927
    Abstract: A semiconductor structure for RF applications comprises: a first ?TP GaN transistor on an SOI wafer or die; and a first resistor connected to the gate of said first transistor.
    Type: Application
    Filed: August 24, 2022
    Publication date: December 29, 2022
    Inventors: Imène Lahbib, Jérôme Loraine, Frédéric Drillet, Albert Kumar, Gregory U'ren
  • Publication number: 20210273085
    Abstract: A semiconductor structure for RF applications comprises: a target substrate; a micro-transfer printed (?TP) gallium nitride (GaN) chiplet on said target substrate, wherein said chiplet comprises a GaN device and a dummy metal layer.
    Type: Application
    Filed: February 26, 2021
    Publication date: September 2, 2021
    Inventors: Jérôme Loraine, Imène Lahbib, Frédéric Drillet, Brice Grandchamp, Lucas logna-Prat, Gregory U'ren
  • Publication number: 20200365619
    Abstract: A semiconductor structure for RF applications comprises: a first ?TP GaN transistor on an SOI wafer or die; and a first resistor connected to the gate of said first transistor.
    Type: Application
    Filed: May 5, 2020
    Publication date: November 19, 2020
    Inventors: Imène Lahbib, Jérôme Loraine, Frédéric Drillet, Albert Kumar, Gregory U'ren
  • Patent number: 10181429
    Abstract: The present invention relates to a method for forming an electronic device intended to accommodate at least one fully depleted transistor of the FDSOI type and at least one partially depleted transistor of the PDSOI type, from a stack of layers (10) comprising at least one insulating layer (100) topped with at least one active layer (200) made of a semiconductor material, the method comprising at least one step of dry etching and one step of height adjustment between at least two etched elements.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: January 15, 2019
    Assignee: X-FAB Semiconductor Foundries AG
    Inventors: Pascal Costaganna, Francis Domart, Gregory U'Ren
  • Publication number: 20170345724
    Abstract: The present invention relates to a method for forming an electronic device intended to accommodate at least one fully depleted transistor of the FDSOI type and at least one partially depleted transistor of the PDSOI type, from a stack of layers (10) comprising at least one insulating layer (100) topped with at least one active layer (200) made of a semiconductor material, the method comprising at least one step of dry etching and one step of height adjustment between at least two etched elements.
    Type: Application
    Filed: May 23, 2017
    Publication date: November 30, 2017
    Inventors: Pascal COSTAGANNA, Francis DOMART, Gregory U'REN
  • Publication number: 20080234970
    Abstract: The invention comprises devices and methods for determining residual stress in MEMS devices such as interferometric modulators. In one example, a device measuring residual stress of a deposited conduct material includes a material used to form a MEMS device, and a plurality of disconnectable electrical paths, wherein said plurality of paths are configured to disconnect as a function of residual stress of the material. In another example, a method of measuring residual stress of a conductive deposited material includes monitoring a plurality of signals, each of said plurality of signals being associated with one of a plurality of test structures, said plurality of test structures each being configured to change the associated signal upon being subject to a predetermined amount of residual stress, sensing a change in said plurality of signals, and determining a residual stress level in said material based on the sensed change in the plurality of signals.
    Type: Application
    Filed: March 23, 2007
    Publication date: September 25, 2008
    Applicant: QUALCOMM Incorporated
    Inventors: Gregory U'Ren, Olivier Pierron
  • Patent number: 7423287
    Abstract: The invention comprises devices and methods for determining residual stress in MEMS devices such as interferometric modulators. In one example, a device measuring residual stress of a deposited conduct material includes a material used to form a MEMS device, and a plurality of disconnectable electrical paths, wherein said plurality of paths are configured to disconnect as a function of residual stress of the material. In another example, a method of measuring residual stress of a conductive deposited material includes monitoring a plurality of signals, each of said plurality of signals being associated with one of a plurality of test structures, said plurality of test structures each being configured to change the associated signal upon being subject to a predetermined amount of residual stress, sensing a change in said plurality of signals, and determining a residual stress level in said material based on the sensed change in the plurality of signals.
    Type: Grant
    Filed: March 23, 2007
    Date of Patent: September 9, 2008
    Assignee: Qualcomm Mems Technologies, Inc.
    Inventors: Gregory U'Ren, Olivier Pierron
  • Publication number: 20070103028
    Abstract: A microelectromechanical systems device having an electrical interconnect between circuitry outside the device and at least one of an electrode and a movable layer within the device. At least a portion of the electrical interconnect is formed from the same material as a conductive layer between the electrode and a mechanical layer of the device. In an embodiment, this conductive layer is a sacrificial layer that is subsequently removed to form a cavity between the electrode and the movable layer. The sacrificial layer is preferably formed of molybdenum, doped silicon, tungsten, or titanium. According to another embodiment, the conductive layer is a movable reflective layer that preferably comprises aluminum.
    Type: Application
    Filed: September 29, 2006
    Publication date: May 10, 2007
    Inventors: Alan Lewis, Manish Kothari, John Batey, Teruo Sasagawa, Ming-Hau Tung, Gregory U'Ren, Stephen Zee