Abstract: A charge pump is driven by at least one clock signal, for converting a supply voltage source into a pumping voltage. The pumping voltage is a function of an amplitude of the at least one clock signal such that an absolute value of the pumping voltage is larger when the amplitude of the at least one clock signal is larger. The amplitude of the at least one clock signal is so modulated as to gradually change from an activation value during an amplitude modulation period. The amplitude modulation period lasts longer than a period of the at least one clock signal by one or more metric orders. The charge pump is activated by the at least one clock signal with the amplitude of the activation value. Thereafter, the charge pump is controlled in such a way that the absolute value of the pumping voltage gradually changes along with the modulation of the amplitude of the at least one clock signal.

Abstract: First and second clocks are applied to first and second capacitors, respectively. First and second former-stage clocks are applied to first and second former-stage capacitors, respectively. A first switch couples the second former-stage capacitor with the first capacitor. A second switch couples the first former-stage capacitor with the second capacitor. A first reverse current preventing circuit couples a control electrode of the first switch alternately with the second capacitor and the second former-stage capacitor. A second reverse current preventing circuit couples a control electrode of the second switch alternately with the first capacitor and the first former-stage capacitor. Falling edges of the first and second clocks occur earlier than falling edges of the first and second former-stage clocks, respectively. Rising edges of the first and second former-stage clocks occur earlier than rising edges of the first and second clocks, respectively.

Abstract: In a pulse frequency modulated (PFM) voltage regulator, a PFM switching controller is provided to generate a PFM switching signal for converting a DC voltage source to an output voltage. A minimum OFF-time controller provides the PFM switching signal with a minimum OFF-time. In response to the output voltage, a feedback circuit generates a feedback signal. When the output voltage is lower than a predetermined target voltage, an OFF-time prolonging circuit prolongs the minimum OFF-time in response to the feedback signal. In other words, a time of delivering energy to a capacitor from an inductor may be prolonged by the OFF-time prolonging circuit. Therefore, a ripple of the output voltage is effectively reduced when the PFM voltage regulator is operated in a heavy loading condition.

Abstract: First and second clocks are applied to first and second capacitors, respectively. First and second former-stage clocks are applied to first and second former-stage capacitors, respectively. A first switch couples the second former-stage capacitor with the first capacitor. A second switch couples the first former-stage capacitor with the second capacitor. A first reverse current preventing circuit couples a control electrode of the first switch alternately with the second capacitor and the second former-stage capacitor. A second reverse current preventing circuit couples a control electrode of the second switch alternately with the first capacitor and the first former-stage capacitor. Falling edges of the first and second clocks occur earlier than falling edges of the first and second former-stage clocks, respectively. Rising edges of the first and second former-stage clocks occur earlier than rising edges of the first and second clocks, respectively.

Abstract: A charge pump is driven by at least one clock signal, for converting a supply voltage source into a pumping voltage. The pumping voltage is a function of an amplitude of the at least one clock signal such that an absolute value of the pumping voltage is larger when the amplitude of the at least one clock signal is larger. The amplitude of the at least one clock signal is so modulated as to gradually change from an activation value during an amplitude modulation period. The amplitude modulation period lasts longer than a period of the at least one clock signal by one or more metric orders. The charge pump is activated by the at least one clock signal with the amplitude of the activation value. Thereafter, the charge pump is controlled in such a way that the absolute value of the pumping voltage gradually changes along with the modulation of the amplitude of the at least one clock signal.

Abstract: A Hall sensing circuit generates a positional detection signal representative of a positional relationship between a rotor and a phase coil of a motor. A signal synthesizing circuit transforms the positional detection signal to a driving signal. Based on a comparison of the driving signal and a high-frequency reference signal, a pulse signal is generated for controlling a switching circuit to dive the motor. A current error signal is supplied through feedback to adjust a relative relationship between an amplitude of the drive signal and an amplitude of the high-frequency reference signal, thereby changing a duty ratio of the pulse signal. A duty-ratio limiting circuit is provided to limit the duty ratio of the pulse signal for ensuring a reliable rotation of the motor.

Abstract: The DC-DC converter of the present invention sets the soft start function in the error amplifier. With soft start added, the error amplifier's output voltage will follow the slowly ascending soft start voltage when the DC-DC converter is enabled. Then the soft start looses control over the error amplifier when the soft start voltage exceeds the steady state value of the error amplifier's output voltage. And meanwhile, the amplifier's input will take over the control. By doing so, the present invention significantly eradicates or reduces jitters caused by the output voltage of the error amplifier and the DC-DC converter.

Abstract: A switching DC-to-DC converter includes multiple power supply channels, coupled in parallel between a DC voltage source and ground, for converting the DC voltage source into multiple DC output voltages that are separate from each other. An oscillator outputs multiple oscillating signals to render each of the multiple power supply channels make at least one switching transition differently in the time domain from others of the multiple power supply channels, thereby improving transient noise. The multiple oscillating signals include two triangular wave signals with a phase difference of 180 degrees and two pulse wave signals with a-phase difference of 180 degrees. Rising edges of the two pulse wave signals occur simultaneously with either a peak or a valley of the two triangular wave signals, respectively.

Abstract: In a pulse frequency modulated (PFM) voltage regulator, a PFM switching signal is provided for converting a DC voltage source to an output voltage. The output voltage is detected. When the output voltage is lower than a predetermined target voltage, a duty cycle of the PFM switching signal is reduced. For example, a minimum OFF-time of the PFM switching signal may be prolonged or a constant ON-time of the PFM switching signal may be shortened. In other words, a period of delivering energy to a capacitor from an inductor may be prolonged or a period of storing energy in the inductor may be shortened. Therefore, a ripple of the output voltage is effectively reduced when the PFM voltage regulator is operated in a heavy loading condition.

Abstract: In a pulse frequency modulated (PFM) voltage regulator, a PFM switching controller is provided to generate a PFM switching signal for converting a DC voltage source to an output voltage. A minimum OFF-time controller provides the PFM switching signal with a minimum OFF-time. In response to the output voltage, a feedback circuit generates a feedback signal. When the output voltage is lower than a predetermined target voltage, an OFF-time prolonging circuit prolongs the minimum OFF-time in response to the feedback signal. In other words, a time of delivering energy to a capacitor from an inductor may be prolonged by the OFF-time prolonging circuit. Therefore, a ripple of the output voltage is effectively reduced when the PFM voltage regulator is operated in a heavy loading condition.

Abstract: A switching DC-to-DC converter includes multiple power supply channels, coupled in parallel between a DC voltage source and ground, for converting the DC voltage source into multiple DC output voltages that are separate from each other. An oscillator outputs multiple oscillating signals to render each of the multiple power supply channels make at least one switching transition differently in the time domain from others of the multiple power supply channels, thereby improving transient noise. The multiple oscillating signals include two triangular wave signals with a phase difference of 180 degrees and two pulse wave signals with a phase difference of 180 degrees. Rising edges of the two pulse wave signals occur simultaneously with either a peak or a valley of the two triangular wave signals, respectively.

Abstract: A first oscillating signal presenting a peak, a valley, a rising portion gradually increasing from the valley to the peak, and a falling portion gradually decreasing from the peak to the valley is generated. A second oscillating signal presenting an instantly transiting edge, which occurs simultaneously with either the peak or the valley of the first oscillating signal, is generated. The first and the second oscillating signals are input to a first and a second power supply channels, respectively, for converting a DC voltage source into two separate DC output voltages. The first and the second oscillating signals cause at least one switching transition of the first power supply channel to occur separately in the time domain from at least one switching transition of the second power supply channel, thereby preventing transient spikes from superposing together.

Abstract: The present invention discloses a current sensing circuit and method of a high-speed driving stage, which comprises an input stage, a level converting unit, a feedback unit, a current mirror unit and a current shunting unit. The current sensing circuit is capable of linearly detecting the output current of the driving stage transistors, and directly condensing the detected current to an appropriate value using the geometric ratio of the transistors, so as to facilitate the subsequent signal processing circuit to use it for control purposes.

Abstract: The DC-DC converter of the present invention sets the soft start function in the error amplifier. With soft start added, the error amplifier's output voltage will follow the slowly ascending soft start voltage when the DC-DC converter is enabled. Then the soft start looses control over the error amplifier when the soft start voltage exceeds the steady state value of the error amplifier's output voltage. And meanwhile, the amplifier's input will take over the control. By doing so, the present invention significantly eradicates or reduces jitters caused by the output voltage of the error amplifier and the DC-DC converter.

Abstract: The present invention discloses a current sensing circuit and method of a high-speed driving stage, which comprises an input stage, a level converting unit, a feedback unit, a current mirror unit and a current shunting unit. The current sensing circuit is capable of linearly detecting the output current of the driving stage transistors, and directly condensing the detected current to an appropriate value using the geometric ratio of the transistors, so as to facilitate the subsequent signal processing circuit to use it for control purposes.

Abstract: A full-wave rectifying device having an amplitude modulation function receives energy emitted from a transceiver via an external antenna and then rectifies it into a DC power source for use by an IC device. One embodiment includes a positive half-wave diode and a negative half-wave diode, whose anodes are connected to ends of the antenna and whose cathodes are formed by the N-substrate. A rectifying NMOS transistor has its gate and drain coupled to ground and its source connected to the anode of the negative half-wave diode. A positive half-wave switch is coupled between the source and bulk of the rectifying NMOS transistor. A negative half-wave switch is coupled between the drain and bulk of the rectifying NMOS transistor.

Abstract: This invention provides a digital television camera processing system and method for feature processing quantized image signals. A single frame memory is required since the frame memory is located prior to the luminance signal processing circuit and the chroma signal processing circuit. The signal processor provides full screen zoom, partial screen zoom, still picture function, mosaic function, and a combination of these functions. Selection of the function is accomplished with inputs to a memory timing control which controls the output sequencing of the frame memory.

Abstract: This invention provides a digital color encoder for digitizing color video signals. The encoder forms a digitized color video signal using logic function processing of the digitized luminance signal and color difference signals. The encoder provides an output signal equivalent to the luminance signal added to the color difference signals modulated by triangular wave functions and sampled at the sampling frequency. The sampling frequency is eight times the crominance subcarrier frequency. An analog video signal can easily be recovered from the digital video signal because the fundamental frequency of the triangular wave is easily separated from the higher order harmonics.