Abstract: A method and system for buffering pixels of a pixel line such that complex processing circuitry between a horizontal format converter buffer and a horizontal format converter filter is not required. The horizontal format converter buffer includes multiple parallel circular buffers that are addressable by a controller such that a variable sequence of pixels may be read from the horizontal format converter buffer to the horizontal format converter filter. The controller may turn off selected circular buffers of the horizontal format converter buffer if the selected buffers are not necessary for processing a pixel line.

Abstract: A method for managing vertical format converter line memories includes writing a number of first input video lines into the VFC line memories, writing an additional video line into the VFC line memories, and reading respective pixels of the first input video lines and the additional input video line from the VFC line memories in parallel. The reading of respective pixels is commenced prior to completion of the writing of the additional video line. A digital video receiving system includes a somewhat similarly configured video processor.

Abstract: A temporally recursive chrominance signal noise reduction can be achieved by subtracting a delayed version of the chrominance output signal from the chrominance input signal and by multiplying the related difference signal by a variable share factor and adding the resulting signal to the chrominance output signal, for achieving different degrees of noise reduction. From the difference signal a motion representative value and a value representing the presence of a smear effect are calculated and used to calculate the variable factor. After having been multiplied by this factor, the difference signal is combined with a frame-delayed version of the chrominance output signal in order to form the noise-reduced chrominance output signal.

Abstract: A method and system for buffering pixels of a pixel line such that complex processing circuit between a horizontal format converter buffer and a horizontal format converter filter is not required. The horizontal format converter buffer (52) includes multiple parallel circular buffers (60, 62 and 64) that are addressable by a controller (54) such that a variable sequence of pixels may be read from the horizontal format converter buffer (52) to the horizontal format converter filter. The controller (54) may turn off selected circular buffers (60, 62 or 64) of the horizontal format converter buffer (52) if the selected buffers (60, 62 or 64) are not necessary for processing a pixel line.