Abstract: Diode recovery current suppression circuits are disclosed for use with power supplies. A power supply circuit including the diode recovery current suppression circuit may include a main inductor and a main diode coupled to the end of the main inductor. In such a context, the diode recovery current suppression circuit can include (a) a set of additional inductive windings, (b) an auxiliary inductor, and (c) an auxiliary diode. The set of additional inductive windings are coupled to the end of the main inductor such that the diode recovery current suppression circuit is coupled in parallel with the main diode.

Abstract: Diode recovery current suppression circuits are disclosed for use with power supplies. A power supply circuit including the diode recovery current suppression circuit may include a main inductor and a main diode coupled to the end of the main inductor. In such a context, the diode recovery current suppression circuit can include (a) a set of additional inductive windings, (b) an auxiliary inductor, and (c) an auxiliary diode. The set of additional inductive windings are coupled to the end of the main inductor such that the diode recovery current suppression circuit is coupled in parallel with the main diode.

Abstract: An AC sensor for measuring voltage and detecting power outages is disclosed. In a disclosed embodiment, the AC sensor includes a plurality of integrators for independently integrating an AC voltage present on the AC power line. It also includes a timing circuit in communication with the integrators. The timing circuit initiates the integration cycles of the integrator such that the integration cycles are staggered in time and such that every two sequentially occurring integration cycles partially overlap.

Abstract: Methods and apparatus are disclosed for achieving load balance between parallel inverters in an AC power supply. Load balancing reduces undesirable cross conduction current between the parallel inverters. Load balancing and the resulting reduction in cross conduction current are achieved without the need for common control circuitry between the parallel inverters. Thus, the single-fault protection offered by redundant parallel inverters is not compromised by the disclosed load balancing techniques.

Abstract: A noise suppression circuit for use with a DC/DC converter having an output and an input responsive at least in part to the output of the converter is provided. The noise suppression circuit includes multiple parallel feedback loops, wherein the first feedback sets the steady state nominal output voltage, the second feedback loop prevents the output voltage from exceeding a predefined high voltage level, and the third feedback loop prevents the output voltage from decreasing below a predefined low voltage level. In some embodiments, the first, second, and third feedback loops comprise a operational amplifier, a diode, and an internal feedback loop, wherein the internal feedback loops of each of these loops share a common node. The common node configuration provides the circuit with quick transitions between output voltage states and dynamic regulation of the DC/DC converter output voltage.