Abstract: A shaping arrangement includes a time parameter assignment unit (TAU) coupled between an input terminal (IN1/16) of an information packet switching system and a corresponding input (SIN1/16) of a switching unit (SU) of that switching system and, a filter circuit (FC) and a buffer circuit (FC) coupled in cascade between an output (SOUT1/16) of the switching unit (SU) and an output terminal (OUT1/16) of the switching system. The time assignment unit (TAU) calculates, according to a predetermined algorithm and for each information packet applied to it, the value of a time parameter as a function of the instant in time at which that information packet is applied to the input terminal of the system and inserts the calculated value in the information packet. Thereafter the information packet is switched by the switching unit (SU) to the above mentioned output (SOUT1/16) and thus to the filtering circuit (FC).

Abstract: The policing device verifies at a predetermined location of a communication system whether a cell stream transmitted over that communication system satisfies a negotiated cell interarrival time and a negotiated cell delay variation and takes adequate actions. The verification is performed according to an algorithm including the steps of comparing for each cell of the cell stream and at the predetermined location the current arrival time of the cell with a predicted arrival time and discarding the cell if that predicted arrival time is larger than the sum of the present arrival time and an additional time interval.

Abstract: A policing device is proposed in which a plurality of parallel police processors (PP1, PP2) are included each of which implements a Modified Virtual Scheduling Algorithm and is so able to derive for a cell for which it is activated by an enabling circuit (EC) a conformance signals (CS1, CS2). An arbitration module (AM) generates from the latter signals, a plurality of which may be provided per cell of the input ATM stream (IN), a discard signal (DS) indicating wether or not such a cell may be inserted into an output stream (OUT) by a discard circuit (DC) as well as feedback signals (FS1, FS2) which indicate to a corresponding processor whether or not to carry out an already prepared update of a predicted arrival time used in the above mentioned algorithm. The architecture of the present policing device is very generic in that it allows implementation of any policing method by straightforwardly adapting the arbitration module and the enabling circuit.

Abstract: A policing method is proposed policing an aggregate ATM cell stream (IN) consisting of both high and low priority cells. The method consists in policing the aggregated stream as a whole whilst also policing separately a substream formed by the high priority cells as prescribed by ITU-TS recommendation I.371.