Patents by Inventor Guillaume Lebailly

Guillaume Lebailly has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • RF amplifier
    Patent number: 11424721
    Abstract: An RF amplifier for implementation in SiGe HBT technology is described. The RF amplifier has a cascode stage comprising a common base (CB) transistor and a common emitter (CE) transistor arranged in series between a first voltage rail and a second voltage rail. An RF input is coupled to the base of the CE transistor and an RF output is coupled to the collector of the CB transistor. The RF amplifier includes a CB power-down circuit arranged between the base of the CB transistor and the second voltage rail and a CE power-down circuit arranged between the base of the CE transistor and the second voltage rail. In a power-down mode the CE power-down circuit couples the base of the common-emitter-transistor to the second voltage rail. The CB power-down mode circuit couples the base of the CB transistor to the second voltage rail via a high-ohmic path.
    Type: Grant
    Filed: October 13, 2020
    Date of Patent: August 23, 2022
    Assignee: NXP B.V.
    Inventors: Gian Hoogzaad, Guillaume Lebailly, Klaas-Jan de Langen
  • RF AMPLIFIER
    Publication number: 20210159856
    Abstract: An RF amplifier for implementation in SiGe HBT technology is described. The RF amplifier has a cascode stage comprising a common base (CB) transistor and a common emitter (CE) transistor arranged in series between a first voltage rail and a second voltage rail. An RF input is coupled to the base of the CE transistor and an RF output is coupled to the collector of the CB transistor. The RF amplifier includes a CB power-down circuit arranged between the base of the CB transistor and the second voltage rail and a CE power-down circuit arranged between the base of the CE transistor and the second voltage rail. In a power-down mode the CE power-down circuit couples the base of the common-emitter-transistor to the second voltage rail. The CB power-down mode circuit couples the base of the CB transistor to the second voltage rail via a high-ohmic path.
    Type: Application
    Filed: October 13, 2020
    Publication date: May 27, 2021
    Inventors: Gian Hoogzaad, Guillaume Lebailly, Klaas-Jan De Langen
  • Interface circuit
    Patent number: 8749442
    Abstract: Presented is an interface circuit for connecting a RF antenna to a RF device. The interface circuit comprises: a first terminal adapted to connect to the RF antenna; a second terminal adapted to connect to the RF device; an inductive load connected to the second terminal; a first switch adapted to connect the inductive load to the first terminal; and a resistive load connected to the second terminal via a second switch.
    Type: Grant
    Filed: January 6, 2012
    Date of Patent: June 10, 2014
    Assignee: NXP, B.V.
    Inventors: Frederic Francois Villain, Guillaume Lebailly
  • INTERFACE CIRCUIT
    Publication number: 20120176209
    Abstract: Presented is an interface circuit for connecting a RF antenna to a RF device.
    Type: Application
    Filed: January 6, 2012
    Publication date: July 12, 2012
    Applicant: NXP B.V.
    Inventors: Frederic Francois Villain, Guillaume Lebailly
  • Reduction of sensitivity of an amplifier to an offset voltage
    Patent number: 6700443
    Abstract: The invention relates to a method of amplifying an input signal having a DC component and an AC component. The method includes the steps of: comparing the input signal with a reference value, generating an intermediate signal by subtracting from the input signal a correction signal resulting from the comparison step, rectifying the intermediate signal, evaluating a mean value of the rectified intermediate signal, and multiplying the input signal by the mean value. The invention allows a reduction in the sensitivity of the amplifier to the DC component of the input signal.
    Type: Grant
    Filed: July 3, 2002
    Date of Patent: March 2, 2004
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Eric Bernard Marie Francois Desbonnets, Guillaume Lebailly
  • Reduction of sensitivity of an amplifier to an offset voltage
    Publication number: 20030006840
    Abstract: The invention relates to a method of amplifying an input signal having a DC component and an AC component, including the following steps:
    Type: Application
    Filed: July 3, 2002
    Publication date: January 9, 2003
    Inventors: Eric Bernard Marie Francois Desbonnets, Guillaume Lebailly