Abstract: A programmable gain amplifier that comprises: a transconductance amplifier, a switch leakage compensation circuit and a transimpedance amplifier. The transconductance amplifier provides a transconductance amplifier current signal and includes a switchable resistance network. The switch leakage compensation circuit provides a compensation current signal and comprises a switchable compensation resistance network. The transimpedance amplifier provides the output voltage signal based on the difference between the transconductance amplifier current signal and the compensation current signal. The switchable compensation resistance network comprises a plurality of branches in parallel with each other, wherein each branch includes: a gain-mimicking switch that has a corresponding gain-setting switch in the switchable resistance network; and a leakage-current-conducting switch in series with the gain-mimicking switch.

Abstract: A calibration apparatus for a communication system. The calibration apparatus is configured to: a) set a variable termination-resistance at a receiver to a predetermined value; b) cause a transmitter to send a calibration pattern to the receiver by: setting the differential voltage on the line to a non-zero value during a non-zero-phase; and setting the differential voltage on the line to zero during a subsequent zero-phase; c) compare the differential voltage on the line during the zero-phase with a reduced-bit-value-threshold, wherein the reduced-bit-value-threshold is less than a bit-value-threshold that is used during active communication. If the differential voltage on the line during the zero-phase exceeds the reduced-bit-value-threshold, then the calibration apparatus adjusts the value of the variable termination-resistance and returns to step b).

Abstract: The disclosure relates to a switchable termination resistance circuit for a transceiver physical layer interface. Example embodiments include a switchable termination resistance circuit (301) for a transmission line transceiver (801), the switchable termination resistance circuit (301) comprising: first and second terminals (TXP, TXN) for connection to a transmission line (103); first and second NMOS termination resistance switches (Mnsw1, Mnsw2) having source connections connected together at a midpoint node (303) and gate connections connected to an input node (304); a first resistor (R1) connected between the first terminal (TXP) and a drain connection of the first NMOS termination resistance switch (Mnsw1); a second resistor (R2) connected between the second terminal (TXN) and a drain connection of the second NMOS termination resistance switch (Mnsw2); and a Zener diode (Dz1) having a cathode side connected to the input node (304) and an anode side connected to the midpoint node (303).

Abstract: The disclosure relates to a switchable termination resistance circuit for a transceiver physical layer interface.

Abstract: A bandgap reference circuit includes a first current generator having first and second bipolar transistors for generating a first current that varies proportionally as a function of temperature. A second current generator includes a field effect transistor for generating a second current that varies inversely as a function of temperature. A trimming circuit includes a third bipolar transistor sized to match the first bipolar transistor, a third current generator having a second field effect transistor coupled to a collector and base of the third bipolar transistor to generate a third current based on a base current of the third bipolar transistor, and a trim control circuit configured to modify the second current by adding the third current to or subtracting the third current from the second current based on a trim control signal. A bandgap reference current is generated by summing the first current and the modified second current.

Abstract: The present disclosure relates to a transceiver (100) comprising a first and second terminal, a signal generation unit a signal generation unit (110) for generating a differential output voltage (Vout) between the terminals, a sensor unit (112) configured to measure an electric current (Iout) when flowing through one of the terminals, and a control unit (114) for controlling the signal generation unit, wherein the control unit is configured to control the signal generation unit during a calibration phase to generate a predetermined differential output voltage reference pattern (140), wherein the sensor unit is configured to measure a calibration current unit during the calibration phase, and wherein the control unit is configured to calibrate the signal generation unit depending on the calibration current. The present disclosure also relates to a method for the transceiver.

Abstract: A low voltage bandgap reference circuit (200) is provided which includes a first current generator (202) having first and second circuit branches which include, respectively, first and second bipolar transistors having different sizing reference values for generating a first current at a first resistor that varies proportionally as a function of temperature; a second current generator (204, 205) having a third circuit branch which includes one or more field effect transistors and no bipolar transistors for generating a second current that varies inversely as a function of temperature; and a third circuit (206) connected to generate a bandgap reference current in response to the first current and the second current.

Abstract: A low voltage bandgap reference circuit (200) is provided which includes a first current generator (202) having first and second circuit branches which include, respectively, first and second bipolar transistors having different sizing reference values for generating a first current at a first resistor that varies proportionally as a function of temperature; a second current generator (204, 205) having a third circuit branch which includes one or more field effect transistors and no bipolar transistors for generating a second current that varies inversely as a function of temperature; and a third circuit (206) connected to generate a bandgap reference current in response to the first current and the second current.

Abstract: The present application relates to a sub-bandgap reference source circuit, which comprises a current mirror source, a first branch comprising a first BJT and a second branch comprising a second BJT, the first BJT having an emitter current density lower than an emitter current density of the second BJT, the first branch and the second branch being connected at a first node coupled to ground; a first voltage divider comprising first and second resistances coupled in series, the first resistance being coupled between a base terminal of the first BJT and a second node, the second resistor being coupled to ground; a second voltage divider comprising first and second resistances coupled in series, the first resistance being coupled between the second node and a base terminal of the second BJT, the second resistance being coupled to the first node; and an output terminal coupled to the second node.

Abstract: The present application relates to a sub-bandgap reference source circuit, which comprises a current mirror source, a first branch comprising a first BJT and a second branch comprising a second BJT, the first BJT having an emitter current density lower than an emitter current density of the second BJT, the first branch and the second branch being connected at a first node coupled to ground; a first voltage divider comprising first and second resistances coupled in series, the first resistance being coupled between a base terminal of the first BJT and a second node, the second resistor being coupled to ground; a second voltage divider comprising first and second resistances coupled in series, the first resistance being coupled between the second node and a base terminal of the second BJT, the second resistance being coupled to the first node; and an output terminal coupled to the second node.

Abstract: A detector (110) detects an unwanted oscillation generated by a closed-loop system (112) due to disconnection, improper usage, or absence of a stability-controlling element (104) necessary for the closed-loop system to function properly. An integrated circuit (102) includes the closed-loop system, the detector, and a supervisory system (114) that disables the closed-loop system upon disconnection of the stability-controlling element from the closed-loop system.

Abstract: A detector (110) detects an unwanted oscillation generated by a closed-loop system (112) due to disconnection, improper usage, or absence of a stability-controlling element (104) necessary for the closed-loop system to function properly. An integrated circuit (102) includes the closed-loop system, the detector, and a supervisory system (114) that disables the closed-loop system upon disconnection of the stability-controlling element from the closed-loop system.