Patents by Inventor Guiqiang PENG

Guiqiang PENG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10310894
    Abstract: Provided is a method for generating configuration information of a dynamic reconfigurable processor. The dynamic reconfigurable processor includes a processing unit array, and the processing unit array includes a plurality of processing units. The method includes steps of: reading information of a task to be executed and generating an array configuration information top of the processing unit array according to the information; generating a plurality of processing unit configuration information corresponding to the plurality of processing units respectively according to the information; and assembling the array configuration information top and the plurality of processing unit configuration information.
    Type: Grant
    Filed: June 16, 2014
    Date of Patent: June 4, 2019
    Assignee: TSINGHUA UNIVERSITY
    Inventors: Leibo Liu, Yansheng Wang, Guiqiang Peng, Zhaoshi Li, Shouyi Yin, Shaojun Wei
  • Patent number: 9729277
    Abstract: A signal detecting method and device are disclosed. The method includes: obtaining a matched filtering signal; determining a filtering matrix; decomposing the filtering matrix to obtain a principal diagonal matrix and a non-principal diagonal matrix; obtaining a parameter matrix and a parameter vector according to the principal diagonal matrix, the non-principal diagonal matrix, and the matched filtering signal; obtaining an iterative parameter and an iterative initial value according to the parameter matrix and the parameter vector; and performing an iterative calculation according to the iterative parameter and the iterative initial value; if the number of iterations reaches a preset number, obtaining an iterative final value, and obtaining an input of a decoder according to the iterative final value. The signal detection method may reduce the computational complexity and bit error rate, improve data throughput, and more advantageous for use in a large-scale multi-input multi-output system.
    Type: Grant
    Filed: October 23, 2016
    Date of Patent: August 8, 2017
    Assignee: TSINGHUA UNIVERSITY
    Inventors: Leibo Liu, Guiqiang Peng, Peng Zhang, Yang Xue, Shouyi Yin, Shaojun Wei
  • Publication number: 20170170928
    Abstract: A signal detecting method and device are disclosed. The method includes: obtaining a matched filtering signal; determining a filtering matrix; decomposing the filtering matrix to obtain a principal diagonal matrix and a non-principal diagonal matrix; obtaining a parameter matrix and a parameter vector according to the principal diagonal matrix, the non-principal diagonal matrix, and the matched filtering signal; obtaining an iterative parameter and an iterative initial value according to the parameter matrix and the parameter vector; and performing an iterative calculation according to the iterative parameter and the iterative initial value; if the number of iterations reaches a preset number, obtaining an iterative final value, and obtaining an input of a decoder according to the iterative final value. The signal detection method may reduce the computational complexity and bit error rate, improve data throughput, and more advantageous for use in a large-scale multi-input multi-output system.
    Type: Application
    Filed: October 23, 2016
    Publication date: June 15, 2017
    Inventors: Leibo LIU, Guiqiang PENG, Peng ZHANG, Yang XUE, Shouyi YIN, Shaojun WEI
  • Publication number: 20170052818
    Abstract: Provided is a method for generating configuration information of a dynamic reconfigurable processor. The dynamic reconfigurable processor includes a processing unit array, and the processing unit array includes a plurality of processing units. The method includes steps of: reading information of a task to be executed and generating an array configuration information top of the processing unit array according to the information; generating a plurality of processing unit configuration information corresponding to the plurality of processing units respectively according to the information; and assembling the array configuration information top and the plurality of processing unit configuration information.
    Type: Application
    Filed: June 16, 2014
    Publication date: February 23, 2017
    Inventors: Leibo LIU, Yansheng WANG, Guiqiang PENG, Zhaoshi LI, Shouyi YIN, Shaojun WEI