Abstract: A WAYNE293 LVPRO cell adapted to a serum-free medium environment, and applications thereof are provided. The human embryonic kidney cell WAYNE 293 is preserved in China General Microbiological Culture Collection Center (CGMCC) on May 24, 2021, the address is Institute of Microbiology, Chinese Academy of Sciences, No. 3, No. 1 Yard, Beichen West Road, Chaoyang District, Beijing, the postal code is 100101, and the preservation number is CGMCC No. 22348. The human embryonic kidney cell WAYNE 293 may be derived from suspension culture of HEK293 cells in a serum-free medium free of an anti-agglomeration agent, has the characteristics of short doubling time, high growth density, high virus packaging efficiency, and is an important support for industrial development in the field of cell and gene therapy.

Abstract: The present application discloses a vertical UMOSFET device with a high channel mobility and a preparation method thereof. The vertical UMOSFET device with a high channel mobility includes an epitaxial structure, and a source, a drain and a gate which match the epitaxial structure, where the epitaxial structure includes a first semiconductor, and a second semiconductor and a third semiconductor which are sequentially disposed on the first semiconductor, a groove structure matching the gate is also disposed in the epitaxial structure, and the groove structure continuously extends into the first semiconductor from a first surface of the epitaxial structure; a fourth semiconductor is also disposed at least between an inner wall of the groove structure and the second semiconductor, and the fourth semiconductor is a high resistivity semiconductor.

Abstract: The present disclosure discloses a ballistic transport semiconductor device based on nano array and a manufacturing method thereof. The ballistic transport semiconductor device based on nano array comprises a conducting substrate, more than one semiconductor nano bump portion is arranged on a first surface of the conducting substrate, a top end of the semiconductor nano bump portion is electrically connected with a first electrode, a second surface of the conducting substrate is electrically connected with a second electrode, the second surface and the first surface are arranged back to back, and the height of the semiconductor nano bump portion is less than or equal to a mean free path of a carrier. The carrier is not influenced by various scattering mechanisms in a transporting procedure by virtue of the existence of ballistic transport characteristics, thereby obtaining a semiconductor device having advantages of lower on resistance, less working power consumption.

Abstract: A fluidized bed dryer, comprising at least two channels (1) connected in parallel; at least one wet sludge inlet (3) is provided at the tops of dilute phase zones (5) or above the dilute phase zones (5) in the channels (1), and at least one solid particle heat carrier and one material outlet are provided in dense phase zones (4) in the channels (1); the channels (1) are physically separated, from the middles of the dense phase zones (4) to the bottoms of the dense phase zones (4), in the material flow direction; the width of the bottoms of the dense phase zones (4) is less than the width of the tops of the dense phase zones (4) of the channels (1); the sum of the surface widths of the dense phase zones (4) of the channels (1) is greater than the flow length of sludge and the solid particle heat carrier in the flow direction; the height difference between solid particle heat carrier inlets (6) and air inlets (7) below the dense phase zones should be less than ¾ of the height of a material in the dense phase zo

Abstract: The present disclosure discloses a ballistic transport semiconductor device based on nano array and a manufacturing method thereof. The ballistic transport semiconductor device based on nano array comprises a conducting substrate, more than one semiconductor nano bump portion is arranged on a first surface of the conducting substrate, a top end of the semiconductor nano bump portion is electrically connected with a first electrode, a second surface of the conducting substrate is electrically connected with a second electrode, the second surface and the first surface are arranged back to back, and the height of the semiconductor nano bump portion is less than or equal to a mean free path of a carrier. The carrier is not influenced by various scattering mechanisms in a transporting procedure by virtue of the existence of ballistic transport characteristics, thereby obtaining a semiconductor device having advantages of lower on resistance, less working power consumption.

Abstract: A group III nitride high electron mobility transistor (HEMT) device comprises a source electrode (112), a drain electrode (111), a main gate (116), a top gate (118), an insulating dielectric layer (117) and a heterostructure, wherein the source electrode (112) and the drain electrode (111) are electrically connected via two-dimensional electron gas (2DEG) formed in the heterostructure; the heterostructure comprises a first semiconductor (113) and a second semiconductor (114); the first semiconductor (113) is disposed between the source electrode (112) and drain electrode (111); the second semiconductor (114) is formed on the surface of the first semiconductor (113) and is provided with a band gap wider than the first semiconductor (113); the main gate (116) is disposed at the side of the surface of the second semiconductor (114) adjacent to the source electrode (112), and is in Schottky contact with the second semiconductor (114); the dielectric layer (117) is disposed on the surfaces of the second semiconduc

Abstract: A group III nitride high electron mobility transistor (HEMT) device comprises a source electrode (112), a drain electrode (111), a main gate (116), a top gate (118), an insulating dielectric layer (117) and a heterostructure, wherein the source electrode (112) and the drain electrode (111) are electrically connected via two-dimensional electron gas (2DEG) formed in the heterostructure; the heterostructure comprises a first semiconductor (113) and a second semiconductor (114); the first semiconductor (113) is disposed between the source electrode (112) and drain electrode (111); the second semiconductor (114) is formed on the surface of the first semiconductor (113) and is provided with a band gap wider than the first semiconductor (113); the main gate (116) is disposed at the side of the surface of the second semiconductor (114) adjacent to the source electrode (112), and is in Schottky contact with the second semiconductor (114); the dielectric layer (117) is disposed on the surfaces of the second semiconduc