Patents by Inventor Guojin Liang

Guojin Liang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11488788
    Abstract: The present invention provides a high output voltage supercapacitor having a cathode including layers of phosphorene, an anode comprising zinc, and an organic-solvent-based electrolyte including zinc. The supercapacitor demonstrates a high anti-self-discharge. The organic electrolyte may include an anhydrous zinc salt, tetraethylammonium tetrafluoroborate, and propylene carbonate (Et4NBF4/PC). The electrochemical stability window of Et4NBF4/PC extends beyond 2.5 V. The supercapacitor can be charged to 2.5 V and possesses high initial discharge voltage. The supercapacitor delivered 130 F g?1 even after more than 9500 cycles at a current density of 0.5 A g?1. More importantly, the supercapacitor exhibits a capacitance retention of 70.16% even after 500 hours self-discharge behavior.
    Type: Grant
    Filed: October 15, 2021
    Date of Patent: November 1, 2022
    Assignee: City University of Hong Kong
    Inventors: Chunyi Zhi, Zhaodong Huang, Xinliang Li, Guojin Liang
  • Patent number: 11437644
    Abstract: An electrolyte for use in an energy storage apparatus includes: a metal halide-based electrolytic solution arranged to electrically connect a cathode and an anode of the energy storage apparatus during an operation of charging and discharging cycle. The electrolytic solution includes a first metal halide arranged to prevent a dissolution of the cathode and/or a formation of dendrites on the anode during the operation of charging and discharging cycle, thereby maintaining cyclic stability of the energy storage apparatus.
    Type: Grant
    Filed: December 9, 2019
    Date of Patent: September 6, 2022
    Assignee: City University of Hong Kong
    Inventors: Chunyi Zhi, Guojin Liang, Funian Mo, Zijie Tang
  • Publication number: 20220139641
    Abstract: The present invention provides a high output voltage supercapacitor having a cathode including layers of phosphorene, an anode comprising zinc, and an organic-solvent-based electrolyte including zinc. The supercapacitor demonstrates a high anti-self-discharge. The organic electrolyte may include an anhydrous zinc salt, tetraethylammonium tetrafluoroborate, and propylene carbonate (Et4NBF4/PC). The electrochemical stability window of Et4NBF4/PC extends beyond 2.5 V. The supercapacitor can be charged to 2.5 V and possesses high initial discharge voltage. The supercapacitor delivered 130 F g?1 even after more than 9500 cycles at a current density of 0.5 A g?1. More importantly, the supercapacitor exhibits a capacitance retention of 70.16% even after 500 hours self-discharge behavior.
    Type: Application
    Filed: October 15, 2021
    Publication date: May 5, 2022
    Inventors: Chunyi ZHI, Zhaodong HUANG, Xinliang LI, Guojin LIANG
  • Patent number: 11094929
    Abstract: An electrode for an energy storage device and a method of fabricating such electrode. The electrode includes a plurality of layers of active material defining a layer material structure; and an interlayer material disposed between each adjacent pairs of layer of the active material. The interlayer material is arranged to facilitate a transportation of ions along and/or across the plurality of layers of active material during a charging or a discharging operation of the energy storage device.
    Type: Grant
    Filed: May 6, 2019
    Date of Patent: August 17, 2021
    Assignee: City University of Hong Kong
    Inventors: Chunyi Zhi, Donghong Wang, Zijie Tang, Guojin Liang
  • Publication number: 20210175538
    Abstract: An electrolyte for use in an energy storage apparatus includes: a metal halide-based electrolytic solution arranged to electrically connect a cathode and an anode of the energy storage apparatus during an operation of charging and discharging cycle. The electrolytic solution includes a first metal halide arranged to prevent a dissolution of the cathode and/or a formation of dendrites on the anode during the operation of charging and discharging cycle, thereby maintaining cyclic stability of the energy storage apparatus.
    Type: Application
    Filed: December 9, 2019
    Publication date: June 10, 2021
    Inventors: Chunyi Zhi, Guojin Liang, Funian Mo, Zijie Tang
  • Patent number: 10868267
    Abstract: An electroluminescent device including an electrode, the electrode being ionically conductive; an electroluminescence layer positioned adjacent or in contact with the electrode, the electroluminescence layer being electrically coupled to the electrode; the electroluminescence layer receiving electrical energy from the electrode and illuminating in response to received electrical energy, and wherein the electrode and the electroluminescence layer are repairable such that the function of the electrode and the electroluminescence layer is restored after a deformation.
    Type: Grant
    Filed: July 5, 2018
    Date of Patent: December 15, 2020
    Assignee: City University of Hong Kong
    Inventors: Chunyi Zhi, Guojin Liang
  • Publication number: 20200358089
    Abstract: An electrode for an energy storage device and a method of fabricating such electrode. The electrode includes a plurality of layers of active material defining a layer material structure; and an interlayer material disposed between each adjacent pairs of layer of the active material. The interlayer material is arranged to facilitate a transportation of ions along and/or across the plurality of layers of active material during a charging or a discharging operation of the energy storage device.
    Type: Application
    Filed: May 6, 2019
    Publication date: November 12, 2020
    Inventors: Chunyi Zhi, Donghong Wang, Zijie Tang, Guojin Liang
  • Publication number: 20200013980
    Abstract: An electroluminescent device including an electrode, the electrode being ionically conductive; an electroluminescence layer positioned adjacent or in contact with the electrode, the electroluminescence layer being electrically coupled to the electrode; the electroluminescence layer receiving electrical energy from the electrode and illuminating in response to received electrical energy, and wherein the electrode and the electroluminescence layer are repairable such that the function of the electrode and the electroluminescence layer is restored after a deformation.
    Type: Application
    Filed: July 5, 2018
    Publication date: January 9, 2020
    Inventors: Chunyi Zhi, Guojin Liang
  • Patent number: 7360108
    Abstract: A multi-link receiving mechanism (MRM) is disclosed comprising a plurality of receivers. Each receiver receives a separate data stream, and all receivers receive the same clock signal. The data streams may arrive at the MRM out of alignment relative to each other (i.e. may have inter-pair skew), and the clock signal need not be aligned with any of the data streams. In response to the clock signal and the data stream, each receiver delays the clock signal by a variable delay to derive a reference signal. This is done to achieve a desired relative alignment between the data stream and the reference signal. Once the reference signal is derived, it is used by the receiver to generate a plurality of latching control signals. These latching control signals are thereafter used by the receiver to latch all of the data units of the data stream. Data from the data stream is thus recovered. Each of the receivers operates in the manner described to recover data from each of the data streams.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: April 15, 2008
    Assignee: Pixelworks, Inc.
    Inventor: Guojin Liang
  • Patent number: 7050512
    Abstract: An improved receiver architecture is disclosed comprising a latching mechanism coupled to receive a data stream, and a signal generator for generating latching control signals for controlling the operation of the latching mechanism. The signal generator generates one latching control signal per data period of the data stream, with each latching control signal coinciding approximately with the midpoint of a corresponding data period. The signal generator generates the latching control signals based upon a reference signal, which in one embodiment, coincides approximately with the midpoint of a data period of the data stream. The receiver may further comprise an adjustable delay element and a delay adjustment control. The adjustable delay element receives a clock signal and imposes a variable delay thereon to derive the reference signal used to generate the latching control signals. The magnitude of the variable delay is controlled by the delay adjustment control.
    Type: Grant
    Filed: January 8, 2001
    Date of Patent: May 23, 2006
    Assignee: Pixelworks, Inc.
    Inventor: Guojin Liang
  • Patent number: 6857080
    Abstract: A multi-link receiving mechanism (MRM) is disclosed comprising a plurality of receivers. Each receiver receives a separate data stream, and all receivers receive the same clock signal. The data streams may arrive at the MRM out of alignment relative to each other (i.e. may have inter-pair skew), and the clock signal need not be aligned with any of the data streams. In response to the clock signal and the data stream, each receiver delays the clock signal by a variable delay to derive a reference signal. This is done to achieve a desired relative alignment between the data stream and the reference signal. Once the reference signal is derived, it is used by the receiver to generate a plurality of latching control signals. These latching control signals are thereafter used by the receiver to latch all of the data units of the data stream. Data from the data stream is thus recovered. Each of the receivers operates in the manner described to recover data from each of the data streams.
    Type: Grant
    Filed: January 8, 2001
    Date of Patent: February 15, 2005
    Assignee: Pixelworks, Inc.
    Inventor: Guojin Liang
  • Patent number: 6515536
    Abstract: A differential charge pump utilizing a common mode feedback circuit. The charge pump includes a dual reference current source and outputs a differential current signal by modifying currents routed to the outputs utilizing current paths having transistors maintained in the linear region within the current paths. The common mode feedback circuit includes differential transistors requiring a maximum power supply voltage of a common mode reference voltage plus a transistor threshold voltage.
    Type: Grant
    Filed: June 14, 2001
    Date of Patent: February 4, 2003
    Assignee: S3 Incorporated, Inc.
    Inventors: Guojin Liang, J. Eric Ruetz
  • Publication number: 20010030572
    Abstract: A differential charge pump utilizing a common mode feedback circuit. The charge pump includes a dual reference current source and outputs a differential current signal by modifying currents routed to the outputs utilizing current paths having transistors maintained in the linear region within the current paths. The common mode feedback circuit includes differential transistors requiring a maximum power supply voltage of a common mode reference voltage plus a transistor threshold voltage.
    Type: Application
    Filed: June 14, 2001
    Publication date: October 18, 2001
    Applicant: S3 Incorporated
    Inventors: Guojin Liang, J. Eric Ruetz
  • Patent number: 6275097
    Abstract: A differential charge pump utilizing a common mode feedback circuit. The charge pump includes a dual reference current source and outputs a differential current signal by modifying currents routed to the outputs utilizing current paths having transistors maintained in the linear region within the current paths. The common mode feedback circuit includes differential transistors requiring a maximum power supply voltage of a common mode reference voltage plus a transistor threshold voltage.
    Type: Grant
    Filed: April 2, 1999
    Date of Patent: August 14, 2001
    Assignee: S3 Incorporated, Inc.
    Inventors: Guojin Liang, J. Eric Ruetz
  • Patent number: 5162674
    Abstract: In integrated circuitry having both analog and digital circuits fabricated on the same substrate, switching transients produced by the digital circuitry can propagate through the substrate and induce deleterious effects in the associated analog circuitry. Such switching transients are greatly minimized by the disclosed family of CMOS logic circuits in which a constant DC bias current is steered to change logic states.
    Type: Grant
    Filed: May 10, 1991
    Date of Patent: November 10, 1992
    Assignee: State of Oregon Acting by and Through the State Board of Higher Education on Behalf of Oregon State University
    Inventors: David J. Allstot, Guojin Liang, Howard C. Yang