Abstract: A thermal management power battery assembly and a battery pack having a plurality of the thermal management power battery assemblies connected in series. The battery assembly includes a plurality of staggered battery cells, a thermal conduction module, a liquid cooling module, and a battery cell fixing module for fixing the battery cells. The battery cell fixing module includes a battery cell position limiting device, and assembly supporting device located at two sides of the battery cell position limiting device; the liquid cooling module is integrated in the assembly supporting device; the thermal conduction module is simultaneously in contact with the battery cells and the assembly supporting device. The liquid cooling module is integrated with the assembly supporting device. The liquid cooling module is intergrated with the assembly supporting device.

Abstract: A thermal management power battery assembly and a battery pack having a plurality of the thermal management power battery assemblies connected in series. The battery assembly includes a plurality of staggered battery cells, a thermal conduction module, a liquid cooling module, and a battery cell fixing module for fixing the battery cells. The battery cell fixing module includes a battery cell position limiting device, and assembly supporting device located at two sides of the battery cell position limiting device; the liquid cooling module is integrated in the assembly supporting device; the thermal conduction module is simultaneously in contact with the battery cells and the assembly supporting device. The liquid cooling module is integrated with the assembly supporting device.

Abstract: The present invention provides a method of forming a passivation layer of a MOS device, and a MOS device. The method of forming a passivation layer of a MOS device includes: forming a substrate; forming a dielectric on the substrate; patterning the dielectric to expose a part of the substrate; forming a metal on the exposed part of the substrate, and the dielectric; forming a TEOS on the metal; forming a PSG on the TEOS; and forming a silicon nitrogen compound on the PSG. Therefore, the cracks problem of the passivation can be alleviated.

Abstract: The present invention provides a method of forming a passivation layer of a MOS device, and a MOS device. The method of forming a passivation layer of a MOS device includes: forming a substrate; forming a dielectric on the substrate; patterning the dielectric to expose a part of the substrate; forming a metal on the exposed part of the substrate, and the dielectric; forming a TEOS on the metal; forming a PSG on the TEOS; and forming a nitrogen silicon compound on the PSG. Therefore, the cracks problem of the passivation can be alleviated.