Abstract: A device coupon for use in a hybrid integration process with a silicon platform. The device coupon comprises: an input waveguide, including an input facet; an active waveguide, coupled to the input waveguide, the active waveguide including a III-V semiconductor based electro-optical device; and an output waveguide, configured to couple light between the active waveguide and an output facet. The input waveguide and output waveguide are passive waveguides.

Abstract: A Mach-Zehnder waveguide modulator. In some embodiments, the Mach-Zehnder waveguide modulator includes a first arm including a first optical waveguide, and a second arm including a second optical waveguide. The first optical waveguide includes a junction, and the Mach-Zehnder waveguide modulator further includes a plurality of electrodes for providing a bias across the junction to enable control of the phase of light travelling through the junction.

Abstract: A photonic chip. In some embodiments, the photonic chip includes a waveguide; and an optically active device comprising a portion of the waveguide. The waveguide may have a first end at a first edge of the photonic chip; and a second end, and the waveguide may have, everywhere between the first end and the second end, a rate of change of curvature having a magnitude not exceeding 2,000/mm2.

Abstract: A method of fabricating a device coupon including a waveguide which is suitable for use in a micro-transfer printing process. The method comprises the steps, on a wafer, of: depositing a lower cladding layer on an uppermost surface of the wafer; providing a silicon nitride guiding layer on an uppermost surface of the lower cladding; depositing an upper cladding over at least an uppermost surface of the silicon nitride guiding layer; providing a tether over the coupon, and etching away a region of the uppermost layer of the wafer located between the lower cladding layer and a substrate of the wafer, thereby leaving the lower cladding layer, silicon nitride guiding layer, and upper cladding layer suspended above the wafer via the tether.

Abstract: A silicon based electro-optically active device and method of producing the same. The silicon based electro-optically active device comprising: a silicon-on-insulator (SOI) waveguide; an electro-optically active waveguide including an electro-optically active stack within a cavity of the SOI waveguide; and a lined channel between the electro-optically active stack and the SOI waveguide, the lined channel comprising a liner; wherein the lined channel is filled with a filling material with a refractive index similar to that of a material forming a sidewall of the cavity, to thereby form a bridge-waveguide in the channel between the SOI waveguide and the electro-optically active stack.

Abstract: An electro-optically active device comprising: a silicon on insulator (SOI) substrate including a silicon base layer, a buried oxide (BOX) layer on top of the silicon base layer, a silicon on insulator (SOI) layer on top of the BOX layer, and a substrate cavity which extends through the SOI layer, the BOX layer and into the silicon base layer, such that a base of the substrate cavity is formed by a portion of the silicon base layer; an electro-optically active waveguide including an electro-optically active stack within the substrate cavity; and a buffer region within the substrate cavity beneath the electro-optically active waveguide, the buffer region comprising a layer of Ge and a layer of GaAs.

Abstract: A waveguide optoelectronic device comprising a rib waveguide region, and method of manufacturing a rib waveguide region, the rib waveguide region having: a base of a first material, and a ridge extending from the base, at least a portion of the ridge being formed from a chosen semiconductor material which is different from the material of the base wherein the silicon base includes a first slab region at a first side of the ridge and a second slab region at a second side of the ridge; and wherein: a first doped region extends along: the first slab region and along a first sidewall of the ridge, the first sidewall contacting the first slab region; and a second doped region extends along: the second slab region and along a second sidewall of the ridge, the second sidewall contacting the second slab region.

Abstract: A method of operating an optical modulator. The optical modulator having: a rib waveguide which includes a junction which is either a PIN or PN junction, the junction having a breakdown voltage. The method comprising: applying a reverse bias to the junction, so as to operate the optical modulator around the breakdown voltage of the junction; operating the modulator in an avalanche multiplication and/or band-to-band tunnelling mode by increasing the reverse bias past the breakdown voltage.

Abstract: An optoelectronic device. The optoelectronic device operable to provide a PAM-N modulated output, the device comprising: M optical modulators, M being an integer greater than 1, the M optical modulators being arranged in a cascade, the device being configured to operate in N distinct transmittance states, as a PAM-N modulator, wherein, in each transmittance state of the N distinct transmittance states, each of the M optical modulators has applied to it a respective control voltage equal to one of: a first voltage or a second voltage. One or more of the modulators may include a substrate; a crystalline cladding layer, on top of the substrate; and an optically active region, above the crystalline cladding layer. The crystalline cladding layer may have a refractive index which is less than a refractive index of the optically active region.

Abstract: An optoelectronic device and a method of manufacturing the same. The device comprising: a multi-layered optically active stack; an input waveguide, arranged to guide light into the stack; an output waveguide, arranged to guide light out of the stack; and anti-reflective coatings, located between both the input waveguide and the stack and the stack and the output waveguide; wherein the input waveguide and output waveguide are formed of silicon nitride.

Abstract: A method of fabricating an optoelectronic component within a silicon-on-insulator substrate, the method comprising: providing a silicon-on-insulator (SOI) substrate, the SOI substrate comprising a silicon base layer, a buried oxide (BOX) layer on top of the base layer, and a silicon device layer on top of the BOX layer; etching a first cavity region into the SOI substrate and etching a second cavity region into the SOI substrate, the first cavity region having a first depth and the second cavity region having a second depth, the second depth being greater than the first depth; depositing a multistack epi layer into the first and the second cavity regions simultaneously, the multistack epi layer comprising a first multistack portion comprising a first active region and a second multistack portion comprising a second active region.

Abstract: An optoelectronic device. The optoelectronic device comprising: a silicon-on-insulator platform, including: a silicon waveguide located within a silicon device layer of the platform, a substrate, and an insulator layer between the substrate and the silicon device layer; and a III-V semiconductor based device, located within a cavity of the silicon-on-insulator platform and including a III-V semiconductor based waveguide, coupled to the silicon waveguide; wherein the III-V semiconductor based device includes a heater and one or more electrical traces, connected to the heater, wherein the one or more electrical traces extend from the III-V semiconductor based device to respective contact pads on the silicon-on-insulator platform.

Abstract: A method of transfer printing. The method comprising: providing a precursor photonic device, comprising a substrate and a bonding region, wherein the precursor photonic device includes one or more alignment marks located in or adjacent to the bonding region; providing a transfer die, said transfer die including one or more alignment marks; aligning the one or more alignment marks of the precursor photonic device with the one or more alignment marks of the transfer die; and bonding at least a part of the transfer die to the bonding region.

Abstract: A method of transfer printing. The method comprising: providing a precursor photonic device, comprising a substrate and a bonding region, wherein the precursor photonic device includes one or more alignment marks located in or adjacent to the bonding region; providing a transfer die, said transfer die including one or more alignment marks; aligning the one or more alignment marks of the precursor photonic device with the one or more alignment marks of the transfer die; and bonding at least a part of the transfer die to the bonding region.

Abstract: A germanium based avalanche photo-diode device and method of manufacture thereof. The device including: a silicon substrate; a lower doped silicon region, positioned above the substrate; a silicon multiplication region, positioned above the lower doped silicon region; an intermediate doped silicon region, positioned above the silicon multiplication region; an un-doped germanium absorption region, position above the intermediate doped silicon region; an upper doped germanium region, positioned above the un-doped germanium absorption region; and an input silicon waveguide; wherein: the un-doped germanium absorption region and the upper doped germanium region form a germanium waveguide which is coupled to the input waveguide, and the device also includes a first electrode and a second electrode, and the first electrode extends laterally to contact the lower doped silicon region and the second electrode extends laterally to contact the upper doped germanium region.

Abstract: A silicon based electro-optically active device and method of production thereof. The device comprising: a silicon-on-insulator (SOI) layer; an electro-optically active stack, disposed on top of the SOI layer: a first epitaxially grown structure comprising a first passive waveguide and a second epitaxially grown structure comprising a second passive waveguide, the first and second passive waveguides being disposed adjacent to respective sides of the electro-optically active stack, wherein the first and second passive waveguides are configured to edge couple light from the first passive waveguide into the electro-optically active stack and from the electro-optically active stack into the second passive waveguide; and an evanescent coupling structure, for evanescently coupling light between the SOI layer and the first and second passive waveguides.

Abstract: A method of manufacturing an electro-optically active device. The method comprising the steps of: etching a cavity on a silicon-on-insulator wafer; providing a sacrificial layer adjacent to a substrate of a lll-V semiconductor wafer; epitaxially growing an electro-optically active structure on the lll-V semiconductor wafer; etching the epitaxially grown optically active structure into an electro-optically active mesa; disposing the electro-optically active mesa in the cavity of the silicon-on-insulator wafer and bonding a surface of the electro-optically active mesa, which is distal to the sacrificial layer, to a bed of the cavity; and removing the sacrificial layer between the substrate of the lll-V semiconductor wafer and the electro-optically active mesa.

Abstract: An optoelectronic component including a waveguide, the waveguide comprising an optically active region (OAR), the OAR having an upper and a lower surface; a lower doped region, wherein the lower doped region is located at and/or adjacent to at least a portion of a lower surface of the OAR, and extends laterally outwards from the OAR in a first direction; an upper doped region, wherein the upper doped region is located at and/or adjacent to at least a portion of an upper surface of the OAR, and extends laterally outwards from the OAR in a second direction; and an intrinsic region located between the lower doped region and the upper doped region.

Abstract: A method of manufacturing a III-V based optoelectronic device on a silicon-on-insulator wafer. The silicon-on-insulator wafer comprises a silicon device layer, a substrate, and an insulator layer between the substrate and silicon device layer. The method includes the steps of: providing a device coupon, the device coupon being formed of a plurality of III-V based layers; providing the silicon-on-insulator wafer, the wafer including a cavity with a bonding region; transfer printing the device coupon into the cavity, and bonding a layer of the device coupon to the bonding region, such that a channel is left around one or more lateral sides of the device coupon; filling the channel with a bridge-waveguide material; and performing one or more etching steps on the device coupon, silicon-on-insulator wafer, and/or channel.

Abstract: A method of fabricating an optoelectronic component within a silicon-on-insulator substrate, the method comprising: providing a silicon-on-insulator (SOI) substrate, the SOI substrate comprising a silicon base layer, a buried oxide (BOX) layer on top of the base layer, and a silicon device layer on top of the BOX layer; etching a first cavity region into the SOI substrate and etching a second cavity region into the SOI substrate, the first cavity region having a first depth and the second cavity region having a second depth, the second depth being greater than the first depth; depositing a multistack epi layer into the first and the second cavity regions simultaneously, the multistack epi layer comprising a first multistack portion comprising a first active region and a second multistack portion comprising a second active region.