Abstract: A data interconnect system includes: a plurality of pins arranged within a receptacle, a first one of the pins being a power pin, wherein the pins are electrically isolated from each other within the receptacle; a first switching network including a first plurality of parallel switching devices, each of the parallel switching devices of the first plurality of parallel switching devices coupling a respective one of the pins to a node; a first current path from the node to ground, the first current path including a current device; and a second current path, parallel to the first current path, the second current path including a resistor coupling the node to ground.

Abstract: An apparatus is disclosed for implementing a multi-mode direct-current (DC)-to-DC power converter. In an example aspect, the apparatus includes a DC-to-DC power converter with a flying capacitor, an inductor, and four switches. The inductor is coupled between a second node and a battery node. A first switch is coupled between a first node and a first terminal of the flying capacitor. A second switch is coupled between the first terminal and the second node. A third switch is coupled between a second terminal of the flying capacitor and the second node. A fourth switch is coupled between the second terminal and a ground node. The DC-to-DC power converter is configured to selectively transfer power from the first node to the battery node according to a first operational mode and transfer other power from the battery node to the first node according to a second operational mode.

Abstract: A data interconnect system includes: a plurality of pins arranged within a receptacle, a first one of the pins being a power pin, wherein the pins are electrically isolated from each other within the receptacle; a first switching network including a first plurality of parallel switching devices, each of the parallel switching devices of the first plurality of parallel switching devices coupling a respective one of the pins to a node; a first current path from the node to ground, the first current path including a current device; and a second current path, parallel to the first current path, the second current path including a resistor coupling the node to ground.

Abstract: Certain aspects of the present disclosure generally relate to a connection terminal pattern and layout for a three-level buck regulator. One example electronic module generally includes a substrate, an integrated circuit (IC) package disposed on the substrate and comprising transistors of a three-level buck regulator, a capacitive element of the three-level buck regulator disposed on the substrate, and an inductive element of the three-level buck regulator disposed on the substrate. In certain aspects, the capacitive element and the inductive element may be disposed adjacent to different sides of the IC package.

Abstract: Techniques and apparatus for controlling gate drivers of a switched-mode power supply (SMPS) circuit—such as a three-level buck converter, a divide-by-two charge pump, or an adaptive combination power supply circuit capable of switching therebetween—in a power-saving mode (e.g., a pulse-skipping mode). During such a power-saving mode in which a capacitor of a charge pump is disconnected from at least one power supply rail (e.g., first and second input nodes of the charge pump) and is coupled to power terminals of one or more drivers of the SMPS circuit, the capacitor is temporarily disconnected from the power terminals and temporarily coupled to the at least one power supply rail (e.g., for a few microseconds).

Abstract: Techniques and apparatus for supplying power to gate drivers of a switched-mode power supply (SMPS) circuit. One example power supply circuit generally includes a SMPS circuit having a first input voltage node and a second input voltage node, and a charge pump. The charge pump generally includes a first capacitive element having a first terminal and a second terminal; a first switch coupled between a first input node of the charge pump and the first terminal of the first capacitive element; a second switch coupled between the second terminal of the first capacitive element and a second input node of the charge pump; a third switch coupled between the first terminal of the first capacitive element and the first input voltage node of the SMPS circuit; and a fourth switch coupled between the second terminal of the first capacitive element and the second input voltage node of the SMPS circuit.

Abstract: Methods and apparatus for converting power using a multi-output switched-mode power supply (SMPS) coupled to a multi-cell-in-series battery, such as charging a two-cell-in-series (2S) battery using a dual-output three-level buck converter coupled thereto, or using a multi-input SMPS circuit receiving power from a multi-cell-in-series battery. One example power supply circuit generally includes a switched-mode power supply circuit having an input node and an output node, a battery comprising multiple cells connected in series, a charge pump circuit having a first terminal and a second terminal, the second terminal of the charge pump circuit being coupled to the battery, a first switch coupled between the output node of the switched-mode power supply circuit and the first terminal of the charge pump circuit, and a second switch coupled between the output node of the switched-mode power supply circuit and the second terminal of the charge pump circuit.

Abstract: Methods and apparatus for trickle charging and precharging a dead multi-cell-in-series battery. One example battery charging circuit generally includes a charge pump circuit comprising a plurality of switches, being coupled to first and second power supply nodes, and being configured to multiply (or divide) a first voltage at the first power supply node to generate a second voltage at the second power supply node; a driver circuit configured to drive the plurality of switches in the charge pump circuit; and an arbiter having a first input coupled to the first power supply node, a second input coupled to the second power supply node, a third input coupled to a third power supply node having a third voltage, and an output coupled to a power supply terminal of the driver circuit, the arbiter being configured to select between the first, second, and third voltages to power the driver circuit.

Abstract: A battery charging circuit includes a buck converter, a charge pump power converter, a sensor external to or internal to the battery charging circuit, and a control unit. The charge pump power converter includes an output coupled to an output of the buck converter for charging a battery. The sensor is configured to sense a total input current. The control unit receives the total input current that is sensed and compensates for a variation in an input current to the charge pump power converter based on whether the total input current meets a specified current variance.

Abstract: An apparatus is disclosed for implementing a multi-mode direct-current (DC)-to-DC power converter. In an example aspect, the apparatus includes a DC-to-DC power converter with a flying capacitor, an inductor, and four switches. The inductor is coupled between a second node and a battery node. A first switch is coupled between a first node and a first terminal of the flying capacitor. A second switch is coupled between the first terminal and the second node. A third switch is coupled between a second terminal of the flying capacitor and the second node. A fourth switch is coupled between the second terminal and a ground node. The DC-to-DC power converter is configured to selectively transfer power from the first node to the battery node according to a first operational mode and transfer other power from the battery node to the first node according to a second operational mode.

Abstract: Techniques and apparatus for controlling gate drivers of a switched-mode power supply (SMPS) circuit—such as a three-level buck converter, a divide-by-two charge pump, or an adaptive combination power supply circuit capable of switching therebetween—in a power-saving mode (e.g., a pulse-skipping mode). During such a power-saving mode in which a capacitor of a charge pump is disconnected from at least one power supply rail (e.g., first and second input nodes of the charge pump) and is coupled to power terminals of one or more drivers of the SMPS circuit, the capacitor is temporarily disconnected from the power terminals and temporarily coupled to the at least one power supply rail (e.g., for a few microseconds).

Abstract: Techniques and apparatus for supplying power to gate drivers of a switched-mode power supply (SMPS) circuit. One example power supply circuit generally includes a SMPS circuit having a first input voltage node and a second input voltage node, and a charge pump. The charge pump generally includes a first capacitive element having a first terminal and a second terminal; a first switch coupled between a first input node of the charge pump and the first terminal of the first capacitive element; a second switch coupled between the second terminal of the first capacitive element and a second input node of the charge pump; a third switch coupled between the first terminal of the first capacitive element and the first input voltage node of the SMPS circuit; and a fourth switch coupled between the second terminal of the first capacitive element and the second input voltage node of the SMPS circuit.

Abstract: An apparatus is disclosed for parallel charging of at least one power storage unit. In example implementations, an apparatus includes a charging system. The charging system includes a first charger having a first current path and a second charger having a second current path. The charging system also includes a charging controller coupled to the first current path. The charging system further includes an indication path coupled between the second current path and the charging controller.

Abstract: Certain aspects of the present disclosure generally relate to a connection terminal pattern and layout for a three-level buck regulator. One example electronic module generally includes a substrate, an integrated circuit (IC) package disposed on the substrate and comprising transistors of a three-level buck regulator, a capacitive element of the three-level buck regulator disposed on the substrate, and an inductive element of the three-level buck regulator disposed on the substrate. In certain aspects, the capacitive element and the inductive element may be disposed adjacent to different sides of the IC package.

Abstract: Certain aspects of the present disclosure generally relate to methods and apparatus for providing surge protection for a switched-mode power supply (SMPS), such as a SMPS used in a battery-charging circuit. One example surge protection circuit generally includes an input node; an output node; a reference potential node; a transistor coupled between the input node and the output node; a diode device having an anode coupled to the input node and a cathode coupled to a control node of the transistor; a voltage-clamping circuit coupled between the output node and the control node; and a first switch coupled between the control node of the transistor and the reference potential node.

Abstract: A battery charging circuit includes a buck converter, a charge pump power converter, a sensor external to or internal to the battery charging circuit, and a control unit. The charge pump power converter includes an output coupled to an output of the buck converter for charging a battery. The sensor is configured to sense a total input current. The control unit receives the total input current that is sensed and compensates for a variation in an input current to the charge pump power converter based on whether the total input current meets a specified current variance.

Abstract: In a controller for a DC to DC converter, PWM signal generating circuitry generates a set of PWM signals phase-shifted relative to one another, and controls states of the PWM signals according to a set of control signals. Each PWM signal of the PWM signals has an on-time state and an off-time state. Ramp signal generating circuitry, coupled to the PWM signal generating circuitry, generates a set of ramp signals having substantially the same ramp slope. Each ramp signal of the ramp signals is generated in response to detecting an on-time state of a corresponding PWM signal of the PWM signals. Additionally, a comparing circuit, coupled to the PWM and ramp signal generating circuitry, alternately compares the ramp signals with a preset reference to generate the control signals. A corresponding control signal of the control signals changes the corresponding PWM signal from the on-time state to an off-time state.

Abstract: A fixing member, a cooking range and an oven with the same are provided. The fixing member includes: a base plate defining a mounting hole; a connecting plate comprising a first plate segment connected at a first side of the base plate, a second plate segment, and a third plate segment substantially parallel to the base plate, the second plate segment being connected between the first and third plate segments; and a fixing plate defining a first end connected at a second side of the base plate and perpendicular to the base plate, and a second end having a snapping tongue bent and extended in a direction away from the connecting plate, a vertical distance between a free end of the snapping tongue and the base plate being equal to or smaller than that between the third plate segment and the base plate.

Abstract: In a power transfer system, a first main switch can transfer power from a first connector to an output terminal. A first path can deliver a current from the first connector to the output terminal and control the current to be within a predefined ranger. A second main switch can transfer power from a second connector to the output terminal. A second path can deliver a current from the second connector to the output terminal and control the current to be within a predefined range. Control circuitry can turn off the second main switch and the second path and turn on the first path if the first power source is available at the first connector when the second power source is providing power to the output terminal. The control circuitry can turn on the first main switch when a time interval from turning on the first path has elapsed.

Abstract: In a controller for a DC to DC converter, PWM signal generating circuitry generates a set of PWM signals phase-shifted relative to one another, and controls states of the PWM signals according to a set of control signals. Each PWM signal of the PWM signals has an on-time state and an off-time state. Ramp signal generating circuitry, coupled to the PWM signal generating circuitry, generates a set of ramp signals having substantially the same ramp slope. Each ramp signal of the ramp signals is generated in response to detecting an on-time state of a corresponding PWM signal of the PWM signals. Additionally, a comparing circuit, coupled to the PWM and ramp signal generating circuitry, alternately compares the ramp signals with a preset reference to generate the control signals. A corresponding control signal of the control signals changes the corresponding PWM signal from the on-time state to an off-time state.