Patents by Inventor Guseul BAEK

Guseul BAEK has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10878866
    Abstract: According to one embodiment, there is provided a semiconductor storage device including a bit cell, a dummy cell, a word line, a dummy word line, a word line driver, a dummy word line driver, a first modulation circuit, and a second modulation circuit. The word line is electrically connected to the bit cell. The dummy word line is electrically connected to the dummy cell. The word line driver is electrically connected to the word line. The dummy word line driver is electrically connected to the dummy word line. The first modulation circuit is electrically connected to the word line driver. The second modulation circuit is electrically connected to the dummy word line driver.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: December 29, 2020
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Guseul Baek
  • Publication number: 20200294564
    Abstract: According to one embodiment, there is provided a semiconductor storage device including a bit cell, a dummy cell, a word line, a dummy word line, a word line driver, a dummy word line driver, a first modulation circuit, and a second modulation circuit. The word line is electrically connected to the bit cell. The dummy word line is electrically connected to the dummy cell. The word line driver is electrically connected to the word line. The dummy word line driver is electrically connected to the dummy word line. The first modulation circuit is electrically connected to the word line driver. The second modulation circuit is electrically connected to the dummy word line driver.
    Type: Application
    Filed: September 5, 2019
    Publication date: September 17, 2020
    Inventor: Guseul Baek
  • Patent number: 10056133
    Abstract: A semiconductor memory device includes a cell array including memory cells. A potential generation circuit applies a first potential to the memory cells. A control signal output circuit outputs a control signal based on the first potential. A pulse width adjustment circuit adjusts a pulse width of a word line voltage of the cell array based on the control signal. An amplitude of a voltage applied to bit lines connected to the memory cells is controlled with the pulse width.
    Type: Grant
    Filed: March 1, 2017
    Date of Patent: August 21, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Guseul Baek, Toshikazu Fukuda
  • Publication number: 20180068709
    Abstract: A semiconductor memory device includes a cell array including memory cells. A potential generation circuit applies a first potential to the memory cells. A control signal output circuit outputs a control signal based on the first potential. A pulse width adjustment circuit adjusts a pulse width of a word line voltage of the cell array based on the control signal. An amplitude of a voltage applied to bit lines connected to the memory cells is controlled with the pulse width.
    Type: Application
    Filed: March 1, 2017
    Publication date: March 8, 2018
    Inventors: Guseul BAEK, Toshikazu FUKUDA