Abstract: The present invention provides an optoelectronic device that includes an optical active layer formed over a substrate and an active region formed in the optical active layer. The optoelectronic device further includes a P-contact and an N-contact formed over a same side of the substrate and associated with the active region, the N-contact is located within a trench formed in the optical active layer and contacts the substrate within the trench.

Abstract: A novel contact structure and method for a multilayer gettering contact metallization is provided utilizing a thin layer of a pure metal as the initial layer formed on a semiconductor cap layer. During formation of the contact structure, this thin metal layer reacts with the cap layer and the resulting reacted layer traps mobile impurities and self-interstitials diffusing within the cap layer and in nearby metal layers, preventing further migration into active areas of the semiconductor device. The contact metallization is formed of pure metal layers compatible with each other and with the underlying semiconductor cap layer such that depth of reaction is minimized and controllable by the thickness of the metal layers applied. Thin semiconductor cap layers, such as InGaAs cap layers less than 200 nm thick, may be used in the present invention with extremely thin pure metal layers of thickness 10 nm or less, thus enabling an increased level of integration for semiconductor optoelectronic devices.

Abstract: A semiconductor device includes a semiconductor layer, prelayer, refractory layer, and conductive layer. The conductive layer includes an ohmic contact layer, and may also include a barrier layer, of a highly stable, low-resistance element or compound, such as Au or Ti, which is formed on the refractory layer. The refractory layer is a material that does not react with, or dissociate from, either the prelayer or the conductive layer when the semiconductor device is exposed to relatively high temperatures. The refractory layer material may be metal suicides, phosphides, or nitrides. The material of the prelayer is selected to minimize strain between the prelayer, the refractory layer and the semiconductor layer to provide a relatively strong bond between the refractory layer and semiconductor. The prelayer may be selected to provide relatively high current injection to the semiconductor, and may further form a low Schottky barrier height with the semiconductor.

Abstract: The invention relates to semiconductor lasers and more particularly to structures which enable the semiconductor lasers to be tested for reliability. The invention further relates to methods for testing the reliability of semiconductor lasers in wafer or chip form. The invention also relates to methods for the fabrication of semiconductor lasers which includes the use of reliability tests in the fabrication process where the reliability tests includes measuring the voltage drop or drops across one or more levels of a laser structure during the passage of current through the structure.

Abstract: Optical components, such as optical semi-isolators, are placed in a fixture that exposes at least a portion of the mounting surface of each optical component when a plasma or ion beam is directed at one side of the fixture, while shielding sensitive surfaces of the optical components (e.g., an optical element mounted within the frame of the optical component) from direct exposure to the plasma or ion beam. Exposure to the plasma or ion beam removes contaminants (e.g., metal oxide) that form on the mounting surface during the fabrication of the optical components when the optical element is mounted within its frame using glass solder in a heated oxygenated environment (e.g., air). By removing enough of the contaminants, the plasma or ion beam cleaning step produces optical components that can be reliably mounted onto substrates, such as the ceramic substrates used in encapsulated laser packages, using flux-less auto-bonding techniques.

Abstract: An n by m array of lenses layer where n is greater than 1 and m is greater than 1 is disposed on a combination of layers comprised of a first walk-off layer, a first non-reciprocal rotator layer, a first half-wave plate layer, a second half-wave plate layer, a second walk-off layer, a second non-reciprocal rotator layer, and a mirror layer. A method of forming optical p by q structures, where p is greater than 1 is provided. An n by m array of lenses layer where n is greater than 1 and m is greater than 1 is disposed on a combination of layers. The combination of layers is formed of the layers described above. An n by m structure comprising the array of lenses and the combination of layers is formed which is then divided into p by q structures having a p by q array of lenses layer, where p is greater than 1. Preferably p by 1 optical circulator strips are formed. Preferably all layers are formed by lithographic methods. The n by m array of lenses can be formed by reactive ion etching.

Abstract: A compliant layer metallization for relieving thermal and mechanical stress developed between a semiconductor and a semiconductor submount. The compliant layer metallization includes a compliant layer, a wetting layer and a barrier layer. The compliant layer provides thermal and mechanical stress relief. The wetting layer ensures adequate wetting during soldering. The barrier layer prevents diffusion of bonding material into the compliant layer and/or into the semiconductor during solder-bonding. The compliant layer metallization design promotes ease of manufacturing.

Abstract: Partially recessed microlenses (31, 32; FIG. 3) are made in a substrate (10) by a technique including the steps of forming a hard-baked patterned layer (21, 22, 64, FIG. 2) on a surface of the substrate, this patterned layer having at least one island portion (21, 22) surrounded by an auxiliary portion (64), and simultaneously etching this hard-baked patterned layer and the substrate to remove at least a portion of the thickness of the hard-baked layer. The island portions are located at areas overlying where microlenses are desired. The volume of the auxiliary portions of the hard-baked patterned layer is advantageously significantly greater than that of the island portions.Full recessed microlenses (31, 32; FIG. 6) are made by adding a step in the above technique, namely, the step of forming another hard-baked patterned layer (94) covering only the auxiliary portions of the above-mentioned patterned layer prior to the etching.

Abstract: A process for fabricating a semiconductor-metal-semiconductor electronic device and the device formed thereby from a semiconductor substrate is described. The substrate forms a first active region of the device. A porous layer of conductive material is deposited on the substrate preferably by molecular beam epitaxy forming a control region. A layer of a semiconductor material epitaxially matched to the substrate is then grown on the layer of conductive material so that the layer of semiconductor material forms a second active region of an electronic device.

Abstract: An optical switch is formed by a microstrip transmission line on the surface of a photoconductive semiconductor medium. The transmission line has a small gap which produces an open circuit between a microwave (or other electrical signal) source and a detector connected at opposite ends of the line. This gap is filled (and the microwave circuit thereby completed) by copious electrical charges which are generated in a semiconductor surface region across the gap in response to optical radiation. The gap is composed of a textured surface graded composition photosensitive semiconductor material to provide high speed and reduced noise.

Abstract: Non-invasive structures for laterally confining charge carriers in the narrow bandgap layers of a multiple quantum wall semiconductor device are disclosed. Such structures can be expected to be useful in charge coupled devices.

Abstract: A frequency multiplier circuit for producing higher order harmonics of an input frequency is disclosed. The frequency multiplier circuit comprises a multiple quantum well semiconductor device which is used to couple energy from an input circuit tuned to the input frequency to an output circuit which is tuned to a desired higher order harmonic of the input frequency.

Abstract: A method of device fabrication using selective area regrowth Group III-V compound semiconductors with tungsten patterning is described.

Abstract: An infrared detector and method of detection based on depletion of charge stored in localized states is disclosed. The detector and method involve the determination of the depletion of charge stored in localized states at low temperatures caused by electric field-assisted photoemission of charge carriers from the localized states. The depletion of stored charge is indicative of the integrated incident flux of infrared radiation. The depletion of stored charge can be sensed by quantum mechanical field ionization, field detachment or otherwise.