Patents by Inventor Gustav E. Sittmann

Gustav E. Sittmann has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120221757
    Abstract: One or more message signaled interruption requests from one or more input/output (I/O) adapters are converted to I/O adapter event notifications. Each I/O adapter event notification includes the setting of one or more specific indicators in system memory and an interruption request, the first of which results in a pending I/O adapter interruption request. While a request for an I/O adapter interruption is pending, subsequent message signaled interruption requests are converted to I/O adapter event notifications, but do not result in additional requests for I/O adapter interruptions.
    Type: Application
    Filed: May 2, 2012
    Publication date: August 30, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: David Craddock, Janet R. Easton, Mark S. Farrell, Thomas A. Gregg, Eric N. Lais, Gustav E. Sittmann, III, Cynthia Sitmann
  • Publication number: 20120216198
    Abstract: Input/output (I/O) operation requests from pageable storage mode guests are interpreted without host intervention. In a pageable mode virtual environment, requests issued by pageable storage mode guests are processed by one or more processors of the environment absent intervention from one or more hosts of the environment. Processing of the requests includes manipulating, by at least one processor on behalf of the guests, buffer state information stored in host storage. The manipulating is performed via instructions initiated by the guests and processed by one or more of the processors.
    Type: Application
    Filed: May 3, 2012
    Publication date: August 23, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Janet R. Easton, William A. Holder, Bernd Nerz, Damian L. Osisek, Gustav E. Sittmann, Cynthia Sittmann, Richard P. Tarcza, Leslie W. Wyman
  • Publication number: 20120216022
    Abstract: An instruction is provided to establish various operational parameters for an adapter. These parameters include adapter interruption parameters, input/output address translation parameters, resetting error indications, setting measurement parameters, and setting an interception control, as examples. The instruction specifies a function information block, which is a program representation of a device table entry used by the adapter, to be used in certain situations in establishing the parameters. A store instruction is also provided that stores the current contents of the function information block.
    Type: Application
    Filed: May 2, 2012
    Publication date: August 23, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: David Craddock, Mark S. Farrell, Beth A. Glendening, Thomas A. Gregg, Dan F. Greiner, Gustav E. Sittmann, III, Peter K. Szwed, Cynthia Sittmann
  • Patent number: 8239649
    Abstract: Optimizations are provided for frame management operations, including a clear operation and/or a set storage key operation, requested by pageable guests. The operations are performed, absent host intervention, on frames not resident in host memory. The operations may be specified in an instruction issued by the pageable guests.
    Type: Grant
    Filed: November 9, 2011
    Date of Patent: August 7, 2012
    Assignee: International Business Machines Corporation
    Inventors: Charles W. Gainey, Jr., Dan F. Greiner, Lisa Cranton Heller, Damian L. Osisek, Gustav E. Sittmann, III, Cynthia Sittmann, legal representative
  • Publication number: 20120198114
    Abstract: One or more message signaled interruption requests from one or more input/output (I/O) adapters are converted to I/O adapter event notifications while retaining the message vector indication. An I/O adapter event notification may be routed and presented to a host or to a guest that the host is executing. To present the notification to the correct host or to the correct guest, various data structures in host and/or guest memory are used.
    Type: Application
    Filed: April 13, 2012
    Publication date: August 2, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Frank W. Brice, JR., David Craddock, Janet R. Easton, Mark S. Farrell, Thomas A. Gregg, Damian L. Osisek, Gustav E. Sittmann, III, Cynthia Sittmann
  • Publication number: 20120191942
    Abstract: Host page management assist functions are employed to manage storage of a pageable mode virtual environment. These functions enable storage to be managed by a processor of the environment absent intervention of a host of the environment. The functions include a resolve host page function; a pin function; and unpin functions.
    Type: Application
    Filed: March 21, 2012
    Publication date: July 26, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Geoffrey O. Blandy, Janet R. Easton, Lisa C. Heller, William A. Holder, Damian L. Osisek, Gustav E. Sittmann, Richard P. Tarcza, Leslie W. Wyman
  • Patent number: 8230199
    Abstract: What is disclosed is a set key and clear frame management function defined for a machine architecture of a computer system. In one embodiment, a machine instruction is obtained which identifies a first and second general register. Obtained from the first general register is a frame size field indicating whether a storage frame is one of a small block or a large block of data. Obtained from the second general register is an operand address of a storage frame upon which the instruction is to be performed. If the storage frame is a small block, the instruction is performed only on the small block. If the indicated storage frame is a large block of data, an operand address of an initial first block of data within the large block of data is obtained from the second general register. The frame management instruction is performed on all blocks starting from the initial first block.
    Type: Grant
    Filed: January 11, 2008
    Date of Patent: July 24, 2012
    Assignee: International Business Machines Corporation
    Inventors: Dan F. Greiner, Charles W. Gainey, Jr., Lisa C. Heller, Damian L. Osisek, Timothy J. Slegel, Gustav E. Sittmann
  • Patent number: 8214562
    Abstract: A computer program product, an apparatus, and a method for processing communications between a target and an initiator an input/output processing system are provided. The computer program product includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes: sending a message from the initiator to the target, the message requesting suspension of input/output operations between the initiator and the target for a period of time, the period of time being defined by the message; responsive to the message, suspending input/output operation messages for the period of time; performing a system change comprising at least one of: at least one update, a computer program installation, a recovery, and a change in operating parameters; and initiating new input/output operations after at least one of: expiration of the period of time and initiation of new input/output operations by the initiator.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: July 3, 2012
    Assignee: International Business Machines Corporation
    Inventors: Louis W. Ricci, Mark P. Bendyk, Scott M. Carlson, Daniel F. Casper, John R. Flanagan, Roger G. Hathorn, Catherine C. Huang, Matthew J. Kalos, Gustav E. Sittmann, Harry M. Yudenfriend, Matthew R. Craig, Bret W. Holley
  • Patent number: 8214622
    Abstract: Host page management assist functions are employed to manage storage of a pageable mode virtual environment. These functions enable storage to be managed by a processor of the environment absent intervention of a host of the environment. The functions include a resolve host page function; a pin function; and unpin functions.
    Type: Grant
    Filed: May 27, 2004
    Date of Patent: July 3, 2012
    Assignee: International Business Machines Corporation
    Inventors: Geoffrey O. Blandy, Janet R. Easton, Lisa C. Heller, William A. Holder, Damian L. Osisek, Gustav E. Sittmann, Richard P. Tarcza, Leslie W. Wyman
  • Publication number: 20120166758
    Abstract: What is disclosed is a frame management function defined for a machine architecture of a computer system. In one embodiment, a frame management instruction is obtained which identifies a first and second general register. The first general register contains a frame management field having a key field with access-protection bits and a block-size indication. If the block-size indication indicates a large block then an operand address of a large block of data is obtained from the second general register. The large block of data has a plurality of small blocks each of which is associated with a corresponding storage key having a plurality of storage key access-protection bits. If the block size indication indicates a large block, the storage key access-protection bits of each corresponding storage key of each small block within the large block is set with the access-protection bits of the key field.
    Type: Application
    Filed: March 6, 2012
    Publication date: June 28, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Dan F. Greiner, Charles W Gainey, JR., Lisa C. Heller, Damian L. Osisek, Timothy J. Slegel, Gustav E. Sittmann
  • Patent number: 8196139
    Abstract: Input/output (I/O) operation requests from pageable storage mode guests are interpreted without host intervention. In a pageable mode virtual environment, requests issued by pageable storage mode guests are processed by one or more processors of the environment absent intervention from one or more hosts of the environment. Processing of the requests includes manipulating, by at least one processor on behalf of the guests, buffer state information stored in host storage. The manipulating is performed via instructions initiated by the guests and processed by one or more of the processors.
    Type: Grant
    Filed: March 28, 2011
    Date of Patent: June 5, 2012
    Assignee: International Business Machines Corporation
    Inventors: Janet R. Easton, William A. Holder, Bernd Nerz, Damian L. Osisek, Gustav E. Sittmann, Richard P. Tarcza, Leslie W. Wyman
  • Patent number: 8196149
    Abstract: A computer program product, an apparatus, and a method for processing communications between a control unit and a channel subsystem in an input/output processing system are provided. The computer program product includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method including: sending a message from the channel subsystem to the control unit in a first mode; receiving a response from the control unit and determining from the response whether the control unit supports a message protocol; and responsive to the message protocol being supported by the control unit, sending another message using the message protocol from the channel subsystem to the control unit to determine whether the control unit supports a second mode.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: June 5, 2012
    Assignee: International Business Machines Corporation
    Inventors: Louis W. Ricci, Mark P. Bendyk, Scott M. Carlson, Daniel F. Casper, John R. Flanagan, Roger G. Hathorn, Catherine C. Huang, Matthew J. Kalos, Gustav E. Sittmann, Harry M. Yudenfriend
  • Publication number: 20120117275
    Abstract: An computer program product, apparatus, and method for facilitating input/output (I/O) processing for an I/O operation at a host computer system configured for communication with a control unit. The computer program product includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes the host computer system obtaining a transport command word (TCW) for an I/O operation. The TCW specifies a location of one or more I/O commands and a flag set to indicate that the location is an indirect address. The host computer system extracts the location of the one or more I/O commands and the flag from the TCW, gathers the one or more I/O commands responsive to the location specified by the TCW and the flag, and then forwards the one or more I/O commands to the control unit for execution.
    Type: Application
    Filed: January 16, 2012
    Publication date: May 10, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: John R. Flanagan, Daniel F. Casper, Matthew J. Kalos, Dale F. Riedy, Gustav E. Sittmann, Ugochukwu C. Njoku, Catherine C. Huang
  • Patent number: 8166206
    Abstract: The state of an input/output (I/O) operation is determined in an I/O processing system. A command is received from an I/O operating system at a channel subsystem for initiating the I/O operation, a time period is for completion of the I/O operation, and the command for initiating the I/O operation is sent from the channel subsystem to the control unit. Responsive to the time period nearing elapsing without the I/O operation completing, a cancel instruction is received from the I/O operating system at the channel subsystem. Responsive to a determination by the I/O operating system to interrogate the control unit, an instruction to interrogate the control unit is received with the cancel instruction from the I/O operating system.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: April 24, 2012
    Assignee: International Business Machines Corporation
    Inventors: Harry M. Yudenfriend, Daniel F. Casper, John R. Flanagan, Matthew J. Kalos, Dale F. Riedy, Louis W. Ricci, Roger G. Hathorn, Gustav E. Sittmann, Ugochukwu C. Njoku, Catherine C. Huang, Scott M. Carlson
  • Patent number: 8151083
    Abstract: What is disclosed is a frame management function defined for a machine architecture of a computer system. In one embodiment, a frame management instruction is obtained which identifies a first and second general register. The first general register contains a frame management field having a key field with access-protection bits and a block-size indication. If the block-size indication indicates a large block then an operand address of a large block of data is obtained from the second general register. The large block of data has a plurality of small blocks each of which is associated with a corresponding storage key having a plurality of storage key access-protection bits. If the block size indication indicates a large block, the storage key access-protection bits of each corresponding storage key of each small block within the large block is set with the access-protection bits of the key field.
    Type: Grant
    Filed: January 11, 2008
    Date of Patent: April 3, 2012
    Assignee: International Business Machines Corporation
    Inventors: Dan F. Greiner, Charles W. Gainey, Jr., Lisa C. Heller, Damian L. Osisek, Timothy J. Slegel, Gustav E. Sittmann
  • Publication number: 20120054412
    Abstract: Optimizations are provided for frame management operations, including a clear operation and/or a set storage key operation, requested by pageable guests. The operations are performed, absent host intervention, on frames not resident in host memory. The operations may be specified in an instruction issued by the pageable guests.
    Type: Application
    Filed: November 9, 2011
    Publication date: March 1, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Charles W. Gainey, JR., Dan F. Greiner, Lisa Cranton Heller, Damian L. Osisek, Gustav E. Sittmann, III, Cynthia Sittmann
  • Patent number: 8117347
    Abstract: An computer program product, apparatus, and method for facilitating input/output (I/O) processing for an I/O operation at a host computer system configured for communication with a control unit. The computer program product includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes the host computer system obtaining a transport command word (TCW) for an I/O operation. The TCW specifies a location of one or more I/O commands and a flag. The flag is set to indicate that the location is an indirect address. The host computer system extracts the location of the one or more I/O commands and the flag from the TCW. The host computer system gathers the one or more I/O commands responsive to the location specified by the TCW and the flag, and then forwards the one or more I/O commands to the control unit for execution.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: February 14, 2012
    Assignee: International Business Machines Corporation
    Inventors: John R. Flanagan, Daniel F. Casper, Matthew J. Kalos, Dale F. Riedy, Gustav E. Sittmann, Ugochukwu C. Njoku, Catherine C. Huang
  • Patent number: 8108570
    Abstract: A state of an input/output (I/O) operation in an I/O processing system is determined. A request for performing the I/O operation is received from an I/O operating system at a channel subsystem and forwarded to a control unit controlling an I/O device for executing the I/O operation. After a predetermined amount of time passes without receiving indication from the control unit that the I/O operation is completed, an interrogation request is received at the channel subsystem from the I/O operating system for determining the state of the I/O operation. An interrogation command is sent from the channel subsystem to the control unit. A response is received from the control unit, the response indicates a state of the I/O device executing the I/O operation, a state of the control unit controlling the I/O device executing the I/O operation, and the state of the I/O operation being executed.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: January 31, 2012
    Assignee: International Business Machines Corporation
    Inventors: Harry M. Yudenfriend, Daniel F. Casper, John R. Flanagan, Matthew J. Kalos, Dale F. Riedy, Louis W. Ricci, Roger G. Hathorn, Gustav E. Sittmann, Ugochukwu C. Njoku, Catherine C. Huang, Scott M. Carlson
  • Publication number: 20120011341
    Abstract: What is provided is a load page table entry address function defined for a machine architecture of a computer system. In one embodiment, a machine instruction is obtained which contains an opcode indicating that a load page table entry address function is to be performed. The machine instruction contains an M field, a first field identifying a first general register, and a second field identifying a second general register. Based on the contents of the M field, an initial origin address of a hierarchy of address translation tables having at least one segment table is obtained. Based on the obtained initial origin address, dynamic address translation is performed until a page table entry is obtained. The page table entry address is saved in the identified first general register.
    Type: Application
    Filed: September 16, 2011
    Publication date: January 12, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Dan F. Greiner, Lisa C. Heller, Damian L. Osisek, Erwin Pfeffer, Timothy J. Slegel, Gustav E. Sittmann
  • Patent number: 8095847
    Abstract: A computer program product, apparatus, and method for handling exception condition feedback at a channel subsystem of an I/O processing system using data from a control unit are provided. The computer program product includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes sending a command message to the control unit, and receiving a response message in response to the command message. The response message includes exception condition feedback identifying a termination reason code in response to unsuccessful execution of at least one command in the command message. The method also includes interrupting a CPU in the I/O processing system, and reporting status associated with the exception condition feedback to the CPU in an interrupt response block.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: January 10, 2012
    Assignee: International Business Machines Corporation
    Inventors: Scott M. Carlson, Daniel F. Casper, John R. Flanagan, Charles W. Gainey, Roger G. Hathorn, Catherine C. Huang, Matthew J. Kalos, Ugochukwu Charles Njoku, Louis C. Ricci, Gustav E. Sittmann