Patents by Inventor Guy Beaucarne
Guy Beaucarne has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11479022Abstract: A lamination process is disclosed. The process is useful for silicone based lamination adhesive compositions, in particular those which cure at or around room temperature.Type: GrantFiled: February 7, 2018Date of Patent: October 25, 2022Assignee: DOW SILICONES CORPORATIONInventors: Frederic Gubbels, Victor Baily, Gregory Chambard, Guy Beaucarne
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Publication number: 20200398537Abstract: A lamination process is disclosed. The process is useful for silicone based lamination adhesive compositions, in particular those which cure at or around room temperature.Type: ApplicationFiled: February 7, 2018Publication date: December 24, 2020Inventors: Frederic GUBBELS, Victor BAILY, Gregory CHAMBARD, Guy BEAUCARNE
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Patent number: 9246044Abstract: A photovoltaic device is disclosed. In one aspect, the device is formed in a semiconductor substrate. It has a radiation receiving front surface and a rear surface. The device may have a first region of one conductivity type, a second region with the opposite conductivity type adjacent to the front surface, and an antireflection layer. The rear surface is covered by a dielectric layer covering also an inside surface of the via. The front surface has current collecting conductive contacts. The rear surface has conductive contacts extending through the dielectric. A conductive path is in the via for photogenerated current from the front surface. By having the dielectric all over, no aligning and masking is needed. The same dielectric serves to insulate, provide thermal protection, and helps in surface and bulk passivation. It also avoids the need for a junction region near the via, hence reducing unwanted recombination currents.Type: GrantFiled: June 2, 2010Date of Patent: January 26, 2016Assignee: IMECInventors: Jozef Szlufcik, Christophe Allebe, Frederic Dross, Guy Beaucarne
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Publication number: 20150129027Abstract: Production of a silicon wafer coated with a passivation layer. The coated silicon wafer may be suitable for use in photovoltaic cells which convert energy from light impinging on the front face of the cell into electrical energy.Type: ApplicationFiled: April 25, 2013Publication date: May 14, 2015Applicant: DOW CORNING CORPORATIONInventors: Syed Salman Asad, Guy Beaucarne, Pierre Descamps, Vincent Kaiser, Patrick Leempoel
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Publication number: 20150132866Abstract: Production of a silicon wafer coated with a passivation layer. The coated silicon wafer may be suitable for use in photovoltaic cells which convert energy from light impinging on the front face of the cell into electrical energy.Type: ApplicationFiled: April 25, 2013Publication date: May 14, 2015Applicant: DOW CORNING CORPORATIONInventors: Syed Salman Asad, Guy Beaucarne, Pierre Descamps, Vincent Kaiser, Patrick Leempoel
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Publication number: 20140290719Abstract: A method of manufacturing a solar module is described. The method enables a semiconductor element to be mounted onto a load-bearing member early on in the manufacturing process without any undesired effects during later processing.Type: ApplicationFiled: July 26, 2012Publication date: October 2, 2014Inventors: Guy Beaucarne, Ann Walstrom Norris, Jonathan Govaerts, Frederic Dross
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Patent number: 8383492Abstract: A method is provided for producing a thin substrate with a thickness below 750 microns, comprising providing a mother substrate, the mother substrate having a first main surface and a toughness; inducing a stress with predetermined stress profile in at least a portion of the mother substrate, said portion comprising the thin substrate, the induced stress being locally larger than the toughness of the mother substrate at a first depth under the main surface; such that the thin substrate is released from the mother substrate, wherein the toughness of the mother substrate at the first depth is not lowered prior to inducing the stress. The method can be used in the production of, for example, solar cells.Type: GrantFiled: August 31, 2010Date of Patent: February 26, 2013Assignees: IMEC, Katholieke Universiteit Leuven, K.U. Leuven R&DInventors: Frederic Dross, Emmanuel Van Kerschaver, Guy Beaucarne
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Patent number: 7875531Abstract: A method is provided for producing a thin substrate with a thickness below 750 microns, comprising providing a mother substrate, the mother substrate having a first main surface and a toughness; inducing a stress with predetermined stress profile in at least a portion of the mother substrate, said portion comprising the thin substrate, the induced stress being locally larger than the toughness of the mother substrate at a first depth under the main surface; such that the thin substrate is released from the mother substrate, wherein the toughness of the mother substrate at the first depth is not lowered prior to inducing the stress. The method can be used in the production of, for example, solar cells.Type: GrantFiled: April 18, 2007Date of Patent: January 25, 2011Assignees: IMEC, Katholieke Universiteit Leuven, K.U. Leuven R&DInventors: Frédéric Dross, Emmanuel Van Kerschaver, Guy Beaucarne
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Publication number: 20100323472Abstract: A method is provided for producing a thin substrate with a thickness below 750 microns, comprising providing a mother substrate, the mother substrate having a first main surface and a toughness; inducing a stress with predetermined stress profile in at least a portion of the mother substrate, said portion comprising the thin substrate, the induced stress being locally larger than the toughness of the mother substrate at a first depth under the main surface; such that the thin substrate is released from the mother substrate, wherein the toughness of the mother substrate at the first depth is not lowered prior to inducing the stress. The method can be used in the production of, for example, solar cells.Type: ApplicationFiled: August 31, 2010Publication date: December 23, 2010Applicant: IMECInventors: Frédéric Dross, Emmanuel Van Kerschaver, Guy Beaucarne
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Patent number: 7662702Abstract: A method of forming a crystalline silicon layer on a microrough face of a substrate by reducing the microroughness of the face and then performing a metal induced crystallization process on the face is disclosed.Type: GrantFiled: June 7, 2005Date of Patent: February 16, 2010Assignee: IMECInventors: Dries Els Victor Van Gestel, Guy Beaucarne
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Publication number: 20090301557Abstract: A method for the production of a photovoltaic device, for instance a solar cell, is disclosed. In one aspect, the method comprises providing a substrate having a front main surface and a rear surface. The method further comprises depositing a dielectric layer on the rear surface, wherein the dielectric layer has a thickness larger than about 100 nm. The method further comprises depositing a passivation layer comprising hydrogenated SiN on top of the dielectric layer and forming back contacts through the dielectric layer and the passivation layer. In another aspect, corresponding photovoltaic devices, for instance solar cell devices, are also disclosed.Type: ApplicationFiled: September 14, 2007Publication date: December 10, 2009Applicant: Interuniversitair Microelektronica Centrum (IMEC) vzwInventors: Guido Agostinelli, Guy Beaucarne, Patrick Choulat
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Publication number: 20080121280Abstract: A method for the production of a photovoltaic device is disclosed. In one aspect, the method comprises providing a carrier substrate. The method further comprises forming a crystalline semiconductor layer on the substrate. The method further comprises carrying out hydrogen passivation of the crystalline semiconductor layer. The method further comprises creating an emitter on the surface of the passivated crystalline semiconductor layer.Type: ApplicationFiled: November 16, 2007Publication date: May 29, 2008Applicant: Interuniversitair Microelektronica Centrum (IMEC) vzwInventors: Lodiwijk Carnel, Ivan Gordon, Jef Poortmans, Guy Beaucarne
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Publication number: 20070249140Abstract: A method is provided for producing a thin substrate with a thickness below 750 microns, comprising providing a mother substrate, the mother substrate having a first main surface and a toughness; inducing a stress with predetermined stress profile in at least a portion of the mother substrate, said portion comprising the thin substrate, the induced stress being locally larger than the toughness of the mother substrate at a first depth under the main surface; such that the thin substrate is released from the mother substrate, wherein the toughness of the mother substrate at the first depth is not lowered prior to inducing the stress. The method can be used in the production of, for example, solar cells.Type: ApplicationFiled: April 18, 2007Publication date: October 25, 2007Applicant: Interuniversitair Microelecktronica Centrum (IMEC)Inventors: Frederic Dross, Emmanuel Van Kerschaver, Guy Beaucarne
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Publication number: 20060030132Abstract: A method of forming a crystalline silicon layer on a microrough face of a substrate by reducing the microroughness of the face and then performing a metal induced crystallization process on the face is disclosed.Type: ApplicationFiled: June 7, 2005Publication date: February 9, 2006Inventors: Dries Van Gestel, Guy Beaucarne
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Patent number: 6649485Abstract: A method for the manufacture, formation, and removal of porous layers in a semiconductor substrate having at least a surface acting as a cathode. The method comprises applying a solution comprising negative Fluorine (F−) ions between the surface of the semiconductor substrate and an anode. The method further comprises applying a predetermined current between the anode and the cathode. The method further comprises maintaining the predetermined current at substantially the same current value for a sufficient amount of time to obtain a low porosity layer at said surface. A high porosity layer positioned under the low porosity layer is also obtained by the method of the invention.Type: GrantFiled: March 9, 2001Date of Patent: November 18, 2003Assignee: Interuniversitair Microelektronica Centrum (IMEC)Inventors: Chetan Singh Solanki, Renat Bilyalov, Jef Poortmans, Guy Beaucarne
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Publication number: 20010036747Abstract: The present invention concerns a method for the manufacture of porous layers in a semiconductor substrate, comprising the following steps:Type: ApplicationFiled: March 9, 2001Publication date: November 1, 2001Inventors: Chetan Singh Solanky, Renat Bilyalov, Jef Poortmans, Guy Beaucarne