Patents by Inventor Gweltaz Gaudin

Gweltaz Gaudin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • METHOD FOR MOLECULAR ADHESION BONDING WITH COMPENSATION FOR RADIAL MISALIGNMENT
    Publication number: 20120006463
    Abstract: A method for bonding a first wafer on a second wafer by molecular adhesion, where the wafers have an initial radial misalignment between them. The method includes bringing the two wafers into contact so as to initiate the propagation of a bonding wave between the two wafers while a predefined bonding curvature is imposed on at least one of the two wafers during the contacting step as a function of the initial radial misalignment.
    Type: Application
    Filed: October 4, 2010
    Publication date: January 12, 2012
    Inventor: Gweltaz Gaudin
  • METHOD OF PRODUCING A SILICON-ON-SAPPHIRE TYPE HETEROSTRUCTURE
    Publication number: 20110195560
    Abstract: The invention provides a method of producing a heterostructure of the silicon-on-sapphire type, comprising bonding an SOI substrate onto a sapphire substrate and thinning the SOI substrate, thinning being carried out by grinding followed by etching of the SOI substrate. In accordance with the method, grinding is carried out using a wheel with a grinding surface that comprises abrasive particles having a mean dimension of more than 6.7 ?m; further, after grinding and before etching, the method comprises a step of post-grinding annealing of the heterostructure carried out at a temperature in the range of 150° C. to 170° C.
    Type: Application
    Filed: November 19, 2009
    Publication date: August 11, 2011
    Applicant: S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES
    Inventors: Gweltaz Gaudin, Alexandre Vaufredaz, Fleur Guittard
  • SURFACE TREATMENT FOR MOLECULAR BONDING
    Publication number: 20110189834
    Abstract: A method of bonding a first substrate to a second substrate by molecular bonding by forming an insulating layer on the bonding face of the first substrate, chemical-mechanical polishing of the insulating layer, activating a bonding surface of the second substrate by plasma treatment, etching an exposed surface of the insulating layer, and bonding together the two substrates together by molecular bonding wherein the etching is conducted after the chemical-mechanical polishing and before the bonding.
    Type: Application
    Filed: October 27, 2009
    Publication date: August 4, 2011
    Applicant: S.O.I. Tec Silicon on Insulator Technologies Parc Technologique dws Fontaines
    Inventors: Arnaud Castex, Gweltaz Gaudin, Marcel Broekaart
  • SUBSTRATE HAVING A CHARGED ZONE IN AN INSULATING BURIED LAYER
    Publication number: 20110012200
    Abstract: Embodiments of the invention relate to substrates comprising a base wafer, an insulating layer and a top semiconductor layer, wherein the insulating layer comprises at least a zone wherein a density of charges is in absolute value higher than 1010 charges/cm2. The invention also relates to processes for making such substrates.
    Type: Application
    Filed: March 13, 2008
    Publication date: January 20, 2011
    Applicant: S.O.I. TEC SILICON ON INSULATOR TECHNOLOGIES
    Inventors: Frederic Allibert, Gweltaz Gaudin, Fabrice Lallement, Didier Landru, Karine Landry, Mohamad Shaheen, Carlos Mazure
  • PROCESSING FOR BONDING TWO SUBSTRATES
    Publication number: 20110000612
    Abstract: The invention relates to a method for bonding two substrates, in particular two semiconductor substrates which, in order to be able to improve the reliability of the process, provides the step of providing a gaseous flow over the bonding surfaces of the substrates The invention also relates to a corresponding bonding equipment
    Type: Application
    Filed: January 23, 2009
    Publication date: January 6, 2011
    Inventors: Gweltaz Gaudin, Fabrice Lallement, Cyrille Colnat, Pascale Giard