Patents by Inventor Gyeom KIM

Gyeom KIM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230420518
    Abstract: An integrated circuit (IC) device includes a fin-type active region, a channel region on the fin-type active region, a gate line surrounding the channel region, an outer insulating spacer covering a sidewall of the gate line, a source/drain region on the fin-type active region, wherein the source/drain region includes a buffer layer including a portion in contact with the channel region and a portion in contact with the fin-type active region, the buffer layer including an edge buffer portion having a smaller thickness than other portions thereof at a position adjacent to the outer insulating spacer, a local buffer pattern including a wedge portion, the wedge portion filling a space defined by the edge buffer portion and the outer insulating spacer, and a main body layer in contact with each of the buffer layer and the local buffer pattern.
    Type: Application
    Filed: December 27, 2022
    Publication date: December 28, 2023
    Inventors: GYEOM KIM, DAHYE KIM, JINBUM KIM, KYUNGBIN CHUN
  • Patent number: 11821106
    Abstract: A semiconductor process chamber includes a susceptor, a base plate surrounding the susceptor, a liner on an inner sidewall of the base plate, and a preheat ring between the susceptor and the base plate and coplanar with the susceptor. The process chamber further includes an upper dome coupled to the base plate and covering an upper surface of the susceptor. The upper dome includes a first section on an upper surface of the base plate and a second section extending from the first section and overlapping the susceptor. The first section includes a first region on the upper surface of the base plate, a second region extending from the first region past the base plate, and a third region extending from the second region with a decreasing thickness to contact the second section.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: November 21, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Keum Seok Park, Gyeom Kim, Yi Hwan Kim, Sun Jung Kim, Pan Kwi Park, Jeong Ho Yoo
  • Patent number: 11815960
    Abstract: A flexible display apparatus including: a first film including a first surface and a second surface that are opposite each other, and a first groove formed in the first surface, the first film having a first rigidity; a third film on the second surface of the first film; a fourth film facing the third film; an emission display unit between and encapsulated by the third film and the fourth film; and a second film on the fourth film and facing the first film, the second film having a second rigidity that is less than the first rigidity.
    Type: Grant
    Filed: October 10, 2022
    Date of Patent: November 14, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Valeriy Prushinskiy, Won-Sik Hyun, Hyong-Yeol Na, Min-Soo Kim, Mu-Gyeom Kim
  • Publication number: 20230361215
    Abstract: A semiconductor device including a substrate extending in a first direction and a second direction perpendicular to the first direction, a first active pattern protruding from a top surface of the substrate and extending in the first direction, an isolation pattern covering a sidewall of the first active pattern on the substrate, first silicon patterns spaced apart from each other in a third direction on the first active pattern, the third direction perpendicular to the first direction and second direction, a first source/drain layer extending in the third direction from a top surface of the first active pattern on the first active pattern, and in contact with sidewalls of the first silicon patterns, wherein a sidewall of the first source/drain layer in the second direction has a constant inclination with respect to the top surface of the substrate, and a gate structure extending in the second direction while filling a gap between the first silicon patterns on the substrate.
    Type: Application
    Filed: April 12, 2023
    Publication date: November 9, 2023
    Applicants: Samsung Electronics Co., Ltd., Industry-Academic Cooperation Foundation, Yonsei University
    Inventors: Gyeom Kim, Daehong Ko, Jinbum Kim, Sangmoon Lee, Daeseop Byeon, Seran Park, Hyunsu Shin, Kiseok Lee, Chunghee Jo
  • Patent number: 11791400
    Abstract: A method includes forming an active pattern on a substrate, the active pattern comprising first semiconductor patterns and second semiconductor patterns, which are alternately stacked, forming a capping pattern on a top surface and a sidewall of the active pattern, performing a deposition process on the capping pattern to form an insulating layer, and forming a sacrificial gate pattern intersecting the active pattern on the insulating layer. The capping pattern has a crystalline structure and is in physical contact with sidewalls of the first semiconductor patterns and sidewalls of the second semiconductor patterns.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: October 17, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jaemun Kim, Gyeom Kim, Seung Hun Lee, Dahye Kim, Ilgyou Shin, Sangmoon Lee, Kyungin Choi
  • Publication number: 20230326985
    Abstract: A semiconductor device including an active pattern extending in a first direction; a channel pattern on the active pattern and including vertically stacked semiconductor patterns; a source/drain pattern in a recess in the active pattern; a gate electrode on the active pattern and extending in a second direction crossing the first direction, the gate electrode surrounding a top surface, at least one side surface, and a bottom surface of each of the semiconductor patterns; and a gate spacer covering a side surface of the gate electrode and having an opening to the semiconductor patterns, wherein the source/drain pattern includes a buffer layer covering inner sides of the recess, the buffer layer includes an outer side surface and an inner side surface, which are opposite to each other, and each of the outer and inner side surfaces is a curved surface that is convexly curved toward a closest gate electrode.
    Type: Application
    Filed: May 24, 2023
    Publication date: October 12, 2023
    Inventors: Ryong HA, Dongwoo KIM, Gyeom KIM, Yong Seung KIM, Pankwi PARK, Seung Hun LEE
  • Publication number: 20230317792
    Abstract: A semiconductor device includes an active region, a plurality of channel layers disposed to be spaced apart from each other in a vertical direction on the active region, a gate structure extending in a second direction to intersect the active region and the plurality of channel layers and surrounding the plurality of channel layers, a source/drain region disposed on the active region on at least one side of the gate structure and contacting the plurality of channel layers, and a contact plug connected to the source/drain region. The source/drain region includes a first epitaxial layer disposed on the active region and extending to contact the plurality of channel layers, second epitaxial layers disposed on the first epitaxial layer, each including impurities in a first concentration, and doping layers stacked alternately with the second epitaxial layers, each including the impurities in a second concentration higher than the first concentration.
    Type: Application
    Filed: December 2, 2022
    Publication date: October 5, 2023
    Inventors: Gyeom Kim, Jinbum Kim, Sangmoon Lee, Dahye Kim, Kyungbin Chun
  • Patent number: 11755135
    Abstract: An organic light emitting display device includes a substrate including a light-emitting region and a reflection region, a plurality of sensing patterns disposed in the light-emitting region and the reflection region, and including a material having a first reflectivity, and a reflection pattern disposed in the reflection region, and including a material having a second reflectivity, and overlapping the plurality of sensing patterns.
    Type: Grant
    Filed: September 12, 2022
    Date of Patent: September 12, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Seung-Lyong Bok, Young-Seok Seo, Mu-Gyeom Kim
  • Publication number: 20230276678
    Abstract: A diode display includes a substrate having a first island and a second island spaced apart from each other, a first pixel disposed on the first island, and a second pixel disposed on the second island. The first pixel includes a first base layer, a first transistor on the first base layer, a first light emitting element electrically connected to the first transistor, and a first encapsulation layer covering the first light emitting element. The second pixel includes a second base layer, a second transistor on the second base layer, a second light emitting element connected to the second transistor, and a second encapsulation layer covering the second light emitting element.
    Type: Application
    Filed: May 5, 2023
    Publication date: August 31, 2023
    Applicant: Samsung Display Co., Ltd.
    Inventors: Jong Ho HONG, Won Il CHOI, Hye Jin JOO, Won Sang PARK, Mu Gyeom KIM, Man Sik MYEONG, Hyo Yul YOON
  • Publication number: 20230268441
    Abstract: A semiconductor device includes a substrate including a fin-type active region, the fin-type active region extending in a first direction; a plurality of channel layers on the fin-type active region, the plurality of channel layers including an uppermost channel layer, a lowermost channel layer, and an intermediate channel layer isolated from direct contact with each other in a direction perpendicular to an upper surface of the substrate; a gate electrode surrounding the plurality of channel layers and extending in a second direction intersecting the first direction; a gate insulating film between the plurality of channel layers and the gate electrode; and source/drain regions electrically connected to the plurality of channel layers. In a cross section taken in the second direction, the uppermost channel layer has a width greater than a width of the intermediate channel layer.
    Type: Application
    Filed: April 26, 2023
    Publication date: August 24, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jaemun KIM, Dahye KIM, Jinbum KIM, Gyeom KIM, Dohee KIM, Dongwoo KIM, Seunghun LEE
  • Publication number: 20230268395
    Abstract: A semiconductor device includes; a gate structure intersecting an active region, and a plurality of channel layers, extending on the substrate in a second direction, and surrounding the plurality of channel layers; a source/drain region contacting the plurality of channel layers on at least one side of the gate structure and including a first semiconductor material with first impurities having a first conductivity type; and a lower structure in contact with the active region and below the source/drain region. The lower structure includes a first layer disposed on the active region and including an insulating material; a second layer disposed on the first layer and including a second semiconductor material; with an air gap defined by the first layer and the second layer, wherein the second semiconductor material of the second layer has no conductivity type or has a second conductivity type different from the first conductivity type.
    Type: Application
    Filed: December 7, 2022
    Publication date: August 24, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jinbum KIM, Sujin JUNG, Gyeom KIM, Dahye KIM, Ingyu JANG, Kyungbin CHUN
  • Patent number: 11735663
    Abstract: Example semiconductor devices and methods for fabricating a semiconductor device are disclosed. An example device may include a substrate, a first semiconductor pattern spaced apart from the substrate, a first antioxidant pattern extending along a bottom surface of the first semiconductor pattern and spaced apart from the substrate, and a field insulating film on the substrate. The insulating film may cover at least a part of a side wall of the first semiconductor pattern. The first antioxidant pattern may include a first semiconductor material film doped with a first impurity.
    Type: Grant
    Filed: December 30, 2021
    Date of Patent: August 22, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin Bum Kim, Gyeom Kim, Da Hye Kim, Jae Mun Kim, Il Gyou Shin, Seung Hun Lee, Kyung In Choi
  • Publication number: 20230255052
    Abstract: An organic light emitting diode display device, including a flexible substrate; pixels on the flexible substrate, the pixels including an organic emission layer; a pixel definition layer between the pixels, the pixel definition layer including openings; an encapsulation layer covering the pixels; and a conductive light shielding member on the encapsulation layer, the conductive light shielding member not overlapped with the pixels, and overlapped with the pixel definition layer.
    Type: Application
    Filed: April 17, 2023
    Publication date: August 10, 2023
    Applicant: Samsung Display Co., Ltd.
    Inventors: Seong Min WANG, Jung Gun NAM, Byeong Hoon CHO, Mu Gyeom KIM
  • Publication number: 20230215866
    Abstract: An integrated circuit device includes: a fin-type active area protruding from a substrate, extending in a first direction parallel to an upper surface of the substrate, and including a first semiconductor material; an isolation layer arranged on the substrate and covering a lower portion of a sidewall of the fin-type active area, the isolation layer including an insulation liner conformally arranged on the lower portion of the sidewall of the fin-type active area, and an insulation filling layer on the insulation liner; a capping layer surrounding an upper surface and the sidewall of the fin-type active area, including a second semiconductor material different from the first semiconductor material, and with the capping layer having an upper surface, a sidewall, and a facet surface between the upper surface and the sidewall; and a gate structure arranged on the capping layer and extending in a second direction perpendicular to the first direction.
    Type: Application
    Filed: March 13, 2023
    Publication date: July 6, 2023
    Inventors: Jaemun Kim, Gyeom Kim, Dahye Kim, Jinbum Kim, Kyungin Choi, Ilgyou Shin, Seunghun Lee
  • Patent number: 11691046
    Abstract: A treadmill may include two separate left and right belts rotating around two sets of rollers, four legs having an adjustable height via air suspension to customize an inclination of the treadmill, a thermoelectric assembly, a fragrance assembly having a rotating fragrance cartridge to emit various smells toward a user of the treadmill, a display on which exercise programs are played, and an attachment module having a dispensing tray on which treats are dispensed. A handle of the treadmill may have a sensor to sense a height and front-rear position, and a belt divider provided between the left and right belts may have position or proximity sensors to sense a left-right position. An inclination of the treadmill may be automatically adjusted according to positions detected by the sensors, and the fragrance assembly, attachment module, and inclination may be automatically operated in accordance with an exercise program played on the display.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: July 4, 2023
    Assignee: LG ELECTRONICS INC.
    Inventors: Hyunsun Yoo, Joo-Gyeom Kim, Jaehung Chun
  • Patent number: 11688778
    Abstract: A semiconductor device including an active pattern extending in a first direction; a channel pattern on the active pattern and including vertically stacked semiconductor patterns; a source/drain pattern in a recess in the active pattern; a gate electrode on the active pattern and extending in a second direction crossing the first direction, the gate electrode surrounding a top surface, at least one side surface, and a bottom surface of each of the semiconductor patterns; and a gate spacer covering a side surface of the gate electrode and having an opening to the semiconductor patterns, wherein the source/drain pattern includes a buffer layer covering inner sides of the recess, the buffer layer includes an outer side surface and an inner side surface, which are opposite to each other, and each of the outer and inner side surfaces is a curved surface that is convexly curved toward a closest gate electrode.
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: June 27, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ryong Ha, Dongwoo Kim, Gyeom Kim, Yong Seung Kim, Pankwi Park, Seung Hun Lee
  • Patent number: 11683968
    Abstract: A diode display includes a substrate having a first island and a second island spaced apart from each other, a first pixel disposed on the first island, and a second pixel disposed on the second island. The first pixel includes a first base layer, a first transistor on the first base layer, a first light emitting element electrically connected to the first transistor, and a first encapsulation layer covering the first light emitting element. The second pixel includes a second base layer, a second transistor on the second base layer, a second light emitting element connected to the second transistor, and a second encapsulation layer covering the second light emitting element.
    Type: Grant
    Filed: September 24, 2021
    Date of Patent: June 20, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jong Ho Hong, Won Il Choi, Hye Jin Joo, Won Sang Park, Mu Gyeom Kim, Man Sik Myeong, Hyo Yul Yoon
  • Patent number: 11664453
    Abstract: A semiconductor device includes a substrate including a fin-type active region, the fin-type active region extending in a first direction; a plurality of channel layers on the fin-type active region, the plurality of channel layers including an uppermost channel layer, a lowermost channel layer, and an intermediate channel layer isolated from direct contact with each other in a direction perpendicular to an upper surface of the substrate; a gate electrode surrounding the plurality of channel layers and extending in a second direction intersecting the first direction; a gate insulating film between the plurality of channel layers and the gate electrode; and source/drain regions electrically connected to the plurality of channel layers. In a cross section taken in the second direction, the uppermost channel layer has a width greater than a width of the intermediate channel layer.
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: May 30, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jaemun Kim, Dahye Kim, Jinbum Kim, Gyeom Kim, Dohee Kim, Dongwoo Kim, Seunghun Lee
  • Patent number: 11653527
    Abstract: An organic light emitting diode display device, including a flexible substrate; pixels on the flexible substrate, the pixels including an organic emission layer; a pixel definition layer between the pixels, the pixel definition layer including openings; an encapsulation layer covering the pixels; and a conductive light shielding member on the encapsulation layer, the conductive light shielding member not overlapped with the pixels, and overlapped with the pixel definition layer.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: May 16, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Seong Min Wang, Jung Gun Nam, Byeong Hoon Cho, Mu Gyeom Kim
  • Patent number: 11626401
    Abstract: An integrated circuit device includes: a fin-type active area protruding from a substrate, extending in a first direction parallel to an upper surface of the substrate, and including a first semiconductor material; an isolation layer arranged on the substrate and covering a lower portion of a sidewall of the fin-type active area, the isolation layer including an insulation liner conformally arranged on the lower portion of the sidewall of the fin-type active area, and an insulation filling layer on the insulation liner; a capping layer surrounding an upper surface and the sidewall of the fin-type active area, including a second semiconductor material different from the first semiconductor material, and with the capping layer having an upper surface, a sidewall, and a facet surface between the upper surface and the sidewall; and a gate structure arranged on the capping layer and extending in a second direction perpendicular to the first direction.
    Type: Grant
    Filed: August 12, 2020
    Date of Patent: April 11, 2023
    Inventors: Jaemun Kim, Gyeom Kim, Dahye Kim, Jinbum Kim, Kyungin Choi, Ilgyou Shin, Seunghun Lee