Patents by Inventor Gyeong-Gu Kang
Gyeong-Gu Kang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240140822Abstract: A water purifier is provided. A water purifier according to one aspect of the present invention may include a housing having a first accommodation space therein, and made of a paper material; a water purifier faucet disposed in the first accommodation space to receive raw water and discharge purified water; and a filter coupled to the water purifier faucet to generate the purified water by filtering the raw water, wherein the water purifier faucet includes a base frame having a second accommodation space therein in which the filter is accommodated; a water inlet module provided on one side of the base frame to supply raw water introduced from the outside to the filter; and a water outlet module provided on the other side of the base frame to receive the purified water generated by the filter and discharge it to the outside.Type: ApplicationFiled: October 27, 2023Publication date: May 2, 2024Applicant: COWAY Co., Ltd.Inventors: Eui Hwan LEE, Chan Jung PARK, Jun HER, Myeong Hoon KANG, Gyeong Cheol SIN, Sang Gu SIM
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Patent number: 11837132Abstract: An output buffer is disclosed that includes: a buffer circuit that outputs an output signal to an output terminal based on a first input signal provided to a first input terminal and a second input signal provided to a second input terminal; and a current supply circuit that is connected in parallel to the buffer circuit, and provides an auxiliary current to the output terminal based on the first input signal and the second input signal.Type: GrantFiled: October 13, 2021Date of Patent: December 5, 2023Assignees: Samsung Display Co., Ltd., Korea Advanced Institute of Science and TechnologyInventors: Seong Joo Lee, Seok Tae Koh, Gyeong Gu Kang, Oh Jo Kwon, Hyun Sik Kim, Gyu Wan Lim, Keum Dong Jung
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Publication number: 20230326384Abstract: A data driving circuit includes: a resistor string in which a plurality of resistors are connected in series; and a plurality of data channels connected to a high voltage node, intermediate voltage nodes, and a low voltage node of the resistor string and configured to convert a digital data signal into an analog data voltage. Each of the plurality of data channels includes: a main digital-to-analog converter connected to the high voltage node, the intermediate voltage nodes, and the low voltage node, a multiplier connected to an output terminal of the main digital-to-analog converter, a sub digital-to-analog converter connected to some of the high voltage node, the intermediate voltage nodes, and the low voltage node, and a voltage synthesizer connected to an output terminal of the multiplier and an output terminal of the sub digital-to-analog converter.Type: ApplicationFiled: June 16, 2023Publication date: October 12, 2023Inventors: Hyung Gun MA, Gyu Wan LIM, Gyeong Gu KANG, Hyun Sik KIM, Keum Dong JUNG, Moon Jae JEONG
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Patent number: 11736079Abstract: An amplifier circuit includes a differential input terminal, a first power supplier, an amplifier, and a current redistributor. A differential input terminal includes a first differential pair of a p-type and a second differential pair of an n-type, and receives an input voltage. A first power supplier supplies a bias current to the differential input terminal. An amplifier receives an output current of the first differential pair and an output current of the second differential pair, and applies an amplified current to an output node. A current redistributor receives the output current of the first differential pair and the output current of the second differential pair, and provides a redistribution current to the differential input terminal.Type: GrantFiled: January 3, 2022Date of Patent: August 22, 2023Assignees: SAMSUNG DISPLAY CO., LTD., KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Seok-Tae Koh, Seongjoo Lee, Hyun-Sik Kim, Gyeong-Gu Kang, Seunghwa Shin, Ohjo Kwon, Keumdong Jung
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Publication number: 20230260441Abstract: A data driving circuit includes: a resistor string in which a plurality of resistors are connected in series; and a plurality of data channels connected to a high voltage node, intermediate voltage nodes, and a low voltage node of the resistor string and configured to convert a digital data signal into an analog data voltage. Each of the plurality of data channels includes: a main digital-to-analog converter connected to the high voltage node, the intermediate voltage nodes, and the low voltage node, a multiplier connected to an output terminal of the main digital-to-analog converter, a sub digital-to-analog converter connected to some of the high voltage node, the intermediate voltage nodes, and the low voltage node, and a voltage synthesizer connected to an output terminal of the multiplier and an output terminal of the sub digital-to-analog converter.Type: ApplicationFiled: November 11, 2022Publication date: August 17, 2023Inventors: Hyung Gun Ma, Gyu Wan Lim, Gyeong Gu Kang, Hyun Sik Kim, Keum Dong Jung, Moon Jae Jeong
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Patent number: 11721265Abstract: A data driving circuit includes: a resistor string in which a plurality of resistors are connected in series; and a plurality of data channels connected to a high voltage node, intermediate voltage nodes, and a low voltage node of the resistor string and configured to convert a digital data signal into an analog data voltage. Each of the plurality of data channels includes: a main digital-to-analog converter connected to the high voltage node, the intermediate voltage nodes, and the low voltage node, a multiplier connected to an output terminal of the main digital-to-analog converter, a sub digital-to-analog converter connected to some of the high voltage node, the intermediate voltage nodes, and the low voltage node, and a voltage synthesizer connected to an output terminal of the multiplier and an output terminal of the sub digital-to-analog converter.Type: GrantFiled: November 11, 2022Date of Patent: August 8, 2023Assignees: SAMSUNG DISPLAY CO., LTD., KOREAN ADVANCE INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Hyung Gun Ma, Gyu Wan Lim, Gyeong Gu Kang, Hyun Sik Kim, Keum Dong Jung, Moon Jae Jeong
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Publication number: 20220335871Abstract: An output buffer is disclosed that includes: a buffer circuit that outputs an output signal to an output terminal based on a first input signal provided to a first input terminal and a second input signal provided to a second input terminal; and a current supply circuit that is connected in parallel to the buffer circuit, and provides an auxiliary current to the output terminal based on the first input signal and the second input signal.Type: ApplicationFiled: October 13, 2021Publication date: October 20, 2022Inventors: Seong Joo LEE, Seok Tae KOH, Gyeong Gu KANG, Oh Jo KWON, Hyun Sik KIM, Gyu Wan LIM, Keum Dong JUNG
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Publication number: 20220311397Abstract: An amplifier circuit includes a differential input terminal, a first power supplier, an amplifier, and a current redistributor. A differential input terminal includes a first differential pair of a p-type and a second differential pair of an n-type, and receives an input voltage. A first power supplier supplies a bias current to the differential input terminal. An amplifier receives an output current of the first differential pair and an output current of the second differential pair, and applies an amplified current to an output node. A current redistributor receives the output current of the first differential pair and the output current of the second differential pair, and provides a redistribution current to the differential input terminal.Type: ApplicationFiled: January 3, 2022Publication date: September 29, 2022Inventors: Seok-Tae Koh, Seongjoo Lee, Hyun-Sik Kim, Gyeong-Gu Kang, Seunghwa Shin, Ohjo Kwon, Keumdong Jung
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Patent number: 11271582Abstract: A digital-to-analog converter (“DAC”) converts digital image data into analog image signals. The DAC includes a stage outputting different voltages to a first output terminal and a second output terminal based on a voltage supplied to a first input terminal, a voltage supplied to a second input terminal, and a first input bit. The stage includes a switch circuit including switches that are alternately turned on by a control signal, and outputting an intermediate output voltage to a third output terminal based on a first input voltage supplied to the first input terminal and a second input voltage supplied to the second input terminal, and a selector outputting one of the first input voltage and the second input voltage, and the intermediate output voltage.Type: GrantFiled: February 5, 2021Date of Patent: March 8, 2022Assignees: SAMSUNG DISPLAY CO., LTD., KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Seong Joo Lee, Oh Jo Kwon, Gyeong Gu Kang, Seok Tae Koh, Joon Chul Goh, Hyun Sik Kim, Bong Hyun You
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Publication number: 20210359699Abstract: A digital-to-analog converter (“DAC”) converts digital image data into analog image signals. The DAC includes a stage outputting different voltages to a first output terminal and a second output terminal based on a voltage supplied to a first input terminal, a voltage supplied to a second input terminal, and a first input bit. The stage includes a switch circuit including switches that are alternately turned on by a control signal, and outputting an intermediate output voltage to a third output terminal based on a first input voltage supplied to the first input terminal and a second input voltage supplied to the second input terminal, and a selector outputting one of the first input voltage and the second input voltage, and the intermediate output voltage.Type: ApplicationFiled: February 5, 2021Publication date: November 18, 2021Inventors: Seong Joo LEE, Oh Jo KWON, Gyeong Gu KANG, Seok Tae KOH, Joon Chul GOH, Hyun Sik KIM, Bong Hyun YOU
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Patent number: 10615696Abstract: An electronic circuit includes an inductive element, a capacitive element, and switch elements. A first end of the inductive element is connected to an input voltage. A first end of a first switch element is connected to the first end of the inductive element. The capacitive element is connected between a second end of the first switch element and a second end of the inductive element. A second switch element is connected between the second end of the first switch element and a reference voltage. A third switch element is connected between the second end of the inductive element and the reference voltage. A fourth switch element is connected between the second end of the inductive element and a first output voltage. A fifth switch element is connected between the second end of the inductive element and a second output voltage.Type: GrantFiled: December 20, 2018Date of Patent: April 7, 2020Assignees: Samsung Electronics Co., Ltd., Korea Advanced Institute of Science and TechnologyInventors: Minyong Jung, Gyeong-Gu Kang, Gyu-Hyeong Cho, Hyunseok Kim, Heemun Bang, Se-Un Shin, Chang Seok Chae
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Publication number: 20190252978Abstract: An electronic circuit includes an inductive element, a capacitive element, and switch elements. A first end of the inductive element is connected to an input voltage. A first end of a first switch element is connected to the first end of the inductive element. The capacitive element is connected between a second end of the first switch element and a second end of the inductive element. A second switch element is connected between the second end of the first switch element and a reference voltage. A third switch element is connected between the second end of the inductive element and the reference voltage. A fourth switch element is connected between the second end of the inductive element and a first output voltage. A fifth switch element is connected between the second end of the inductive element and a second output voltage.Type: ApplicationFiled: December 20, 2018Publication date: August 15, 2019Inventors: MINYONG JUNG, GYEONG-GU KANG, GYU-HYEONG CHO, HYUNSEOK KIM, HEEMUN BANG, SE-UN SHIN, CHANG SEOK CHAE