Patents by Inventor Hahn Vo Norden

Hahn Vo Norden has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8612662
    Abstract: In one embodiment an electronic device comprises at least one processor, at least one PCI express link, a virtual channel/sub-link flow control module, and a memory module communicatively connected to the one or more processors and comprising logic instructions which, when executed on the one or more processors configure the one or more processors to determine, in an electrical device, whether a virtual channel/sub-link is inactive, and in response to a determination that at least one virtual channel/sub-link is inactive, reallocate queue space from the at least one inactive channel to at least one active channel.
    Type: Grant
    Filed: June 1, 2008
    Date of Patent: December 17, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Hahn Vo Norden
  • Patent number: 8174977
    Abstract: A network node within a network includes a first receive buffer, first buffer management, a second receive buffer and second buffer management. The first buffer management performs link level credit based flow control for network packets that the first buffer management places in the first receive buffer. The second buffer management performs end-to-end credit based flow control for network packets that the second buffer management receives from the first receive buffer and processes before placing data in the second receive buffer.
    Type: Grant
    Filed: July 6, 2007
    Date of Patent: May 8, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Paul V. Brownell, David L. Matthews, James Xuan Dinh, Hubert E. Brinkmann, Dwight D. Riley, Hahn Vo Norden, Kenneth T. Chin
  • Publication number: 20110087820
    Abstract: In one embodiment an electronic device comprises at least one processor, at least one PCI express link, a virtual channel/sub-link flow control module, and a memory module communicatively connected to the one or more processors and comprising logic instructions which, when executed on the one or more processors configure the one or more processors to determine, in an electrical device, whether a virtual channel/sub-link is inactive, and in response to a determination that at least one virtual channel/sub-link is inactive, reallocate queue space from the at least one inactive channel to at least one active channel.
    Type: Application
    Filed: June 1, 2008
    Publication date: April 14, 2011
    Inventor: Hahn Vo Norden
  • Patent number: 7876759
    Abstract: A system is provided comprising a fabric coupling together a plurality of computing devices, wherein the fabric transfers a stream of packets between the computing devices. Each computing device comprises a Quality of Service (“QOS”) filter that monitors incoming packets to filter out packets of a maintenance type and permit transfer of packets of a transaction type.
    Type: Grant
    Filed: July 11, 2007
    Date of Patent: January 25, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Hahn Vo Norden, Hubert E. Brinkmann, Paul V. Brownell, Kenneth T. Chin, James Dinh, David L. Matthews, Dwight D. Riley
  • Publication number: 20090016348
    Abstract: A system is provided comprising a fabric coupling together a plurality of computing devices, wherein the fabric transfers a stream of packets between the computing devices. Each computing device comprises a Quality of Service (“QOS”) filter that monitors incoming packets to filter out packets of a maintenance type and permit transfer of packets of a transaction type.
    Type: Application
    Filed: July 11, 2007
    Publication date: January 15, 2009
    Inventors: Hahn Vo Norden, Hubert E. Brinkmann, Paul V. Brownell, Kenneth T. Chin, James Dinh, David L. Matthews, Dwight D. Riley
  • Publication number: 20090010159
    Abstract: A network node within a network includes a first receive buffer, first buffer management, a second receive buffer and second buffer management. The first buffer management performs link level credit based flow control for network packets that the first buffer management places in the first receive buffer. The second buffer management performs end-to-end credit based flow control for network packets that the second buffer management receives from the first receive buffer and processes before placing data in the second receive buffer.
    Type: Application
    Filed: July 6, 2007
    Publication date: January 8, 2009
    Inventors: Paul V. Brownell, David L. Matthews, James Xuan Dinh, Hubert E. Brinkmann, Dwight D. Riley, Hahn Vo Norden, Kenneth T. Chin
  • Patent number: 7096310
    Abstract: In at least some embodiments of the invention, a system may comprise a plurality of electronic devices adapted to send and receive data, wherein each electronic device uses any one of a plurality of communication protocols. The system may also comprise a switch comprising a plurality of ports, each port is adapted to couple to an electronic device, wherein each port is configurable for use according to the protocol used by the electronic device coupled thereto.
    Type: Grant
    Filed: March 16, 2004
    Date of Patent: August 22, 2006
    Assignee: Hewlett-Packard Development, L.P.
    Inventor: Hahn Vo Norden