Abstract: Provided is an encoder which includes circuitry and memory. Using the memory, the circuitry splits an image block into a plurality of partitions, obtains a prediction image for a partition, and encodes the image block using the prediction image. When the partition is not a non-rectangular partition, the circuitry obtains (i) a first prediction image for the partition, (ii) a gradient image for the first prediction image, and (iii) a second prediction image as the prediction image using the first prediction image and the gradient image. When the partition is a non-rectangular partition, the circuitry obtains the first prediction image as the prediction image without using the gradient image.

Abstract: An encoder capable of properly handling an image to be encoded or decoded includes processing circuitry and memory connected to the processing circuitry. Using the memory, the processing circuitry: obtains parameters including at least one of (i) one or more parameters related to a first process for correcting distortion in an image captured with a wide angle lens and (ii) one or more parameters related to a second process for stitching a plurality of images; generates an encoded image by encoding a current image to be processed that is based on the image or the plurality of images; and writes the parameters into a bitstream including the encoded image.

Abstract: A thin film transistor includes an active layer and at least one gate stack. The active layer may be formed using multiple iterations of a unit layer stack deposition process, which includes an acceptor-type oxide deposition process and a post-transition metal oxide deposition process. A surface of each gate dielectric within the at least one gate stack contacts a surface of a respective layer of the oxide of the acceptor-type element so that leakage current of the active layer may be minimized. A source electrode and a drain electrode may contact an oxide layer providing lower contact resistance such as a layer of the post-transition metal oxide or a zinc oxide layer within the active layer.

Abstract: An encoder capable of properly handling an image to be encoded or decoded includes processing circuitry and memory connected to the processing circuitry. Using the memory, the processing circuitry: obtains parameters including at least one of (i) one or more parameters related to a first process for correcting distortion in an image captured with a wide angle lens and (ii) one or more parameters related to a second process for stitching a plurality of images; generates an encoded image by encoding a current image to be processed that is based on the image or the plurality of images; and writes the parameters into a bitstream including the encoded image.

Abstract: An encoder includes circuitry and memory. The circuitry determines whether a first virtual pipeline decoding unit (VPDU) is split into smaller blocks and whether a second VPDU is split into smaller blocks. In response to a determination the first VPDU is not split into smaller blocks and a determination the second VPDU is split into smaller blocks, a block of chroma samples is predicted without using luma samples. In response to a determination the first VPDU is split into smaller blocks and a determination the second VPDU is split into smaller blocks, the block of chroma samples is predicted using luma samples. In response to a determination the first VPDU is not split into smaller blocks and a determination the second VPDU is not split into smaller block, the block of chroma samples is predicted using luma samples. The block is encoded using the predicted chroma samples.

Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry, in operation, selects an encoding mode from among candidates including a decoder-side motion vector refinement (DMVR) encoding mode and a partition encoding mode. When the DMVR encoding mode is selected, the circuitry: obtains a first motion vector for a first image block; derives a second motion vector from the first motion vector using motion search; and generates a prediction image for the first image block using the second motion vector. When the partition encoding mode is selected, the circuitry: determines a plurality of partitions in a second image block; obtains a third motion vector for each partition; and generates a prediction image for the second image block using the third motion vector, without deriving a fourth motion vector from the third motion vector using motion search.

Abstract: An encoder capable of properly handling an image to be encoded or decoded includes processing circuitry and memory connected to the processing circuitry. Using the memory, the processing circuitry: obtains parameters including at least one of (i) one or more parameters related to a first process for correcting distortion in an image captured with a wide angle lens and (ii) one or more parameters related to a second process for stitching a plurality of images; generates an encoded image by encoding a current image to be processed that is based on the image or the plurality of images; and writes the parameters into a bitstream including the encoded image.

Abstract: Various embodiments of the present disclosure are directed towards a memory device. The memory device has a first transistor having a first source/drain and a second source/drain, where the first source/drain and the second source/drain are disposed in a semiconductor substrate. A dielectric structure is disposed over the semiconductor substrate. A first memory cell is disposed in the dielectric structure and over the semiconductor substrate, where the first memory cell has a first electrode and a second electrode, where the first electrode of the first memory cell is electrically coupled to the first source/drain of the first transistor. A second memory cell is disposed in the dielectric structure and over the semiconductor substrate, where the second memory cell has a first electrode and a second electrode, where the first electrode of the second memory cell is electrically coupled to the second source/drain of the first transistor.

Abstract: An image coding method includes: deriving a candidate for a motion vector of a current block from a co-located motion vector; adding the candidate to a list; selecting the motion vector of the current block from the list; and coding the current block, wherein the deriving includes: deriving the candidate by a first derivation scheme in the case of determining that each of a current reference picture and a co-located reference picture is a long-term reference picture; and deriving the candidate by a second derivation scheme in the case of determining that each of the current reference picture and the co-located reference picture is a short-term reference picture.

Abstract: An encoder includes circuitry and memory connected to the circuitry. The circuitry: derives an absolute value of a sum of horizontal gradient values; derives, as a first parameter, the total sum of the absolute values of horizontal gradient values; derives, as a second parameter, the total sum of the absolute values of vertical gradient values; derives a horizontal-related pixel difference value; derives, as a third parameter, the total sum of the absolute values of horizontal-related pixel difference values; derives a vertical-related pixel difference value; derives, as a fourth parameter, the total sum of the absolute values of vertical-related pixel difference values; and generates a prediction image using the first to fourth parameters.

Abstract: An image coding method includes: writing, into a sequence parameter set, buffer description defining information for defining a plurality of buffer descriptions; writing, into the sequence parameter set, reference list description defining information for defining a plurality of reference list descriptions corresponding to the buffer descriptions; and writing, into a first header of each processing unit which is included in a coded bitstream, buffer description selecting information for specifying a selected buffer description.

Abstract: An encoder, when sub-block encoding is to be performed, determines a plurality of sub-blocks in a first image block, the plurality of sub-blocks including a first sub-block, determines a first motion vector for the first sub-block by referring to a first candidate list, performs first inter prediction processing on the first sub-block using the first motion vector, and encodes the first image block using a result of the first inter prediction processing. When partition encoding is to be performed, the encoder, in operation, determines a plurality of partitions in a second image block, the plurality of partitions including a first partition, determines a second motion vector for the first partition by referring to a second candidate list, performs second inter prediction processing on the first partition using the second motion vector, and encodes the second image block using a result of the second inter prediction processing.

Abstract: A disclosed transistor structure includes a gate electrode, an active layer, a source electrode, a drain electrode, an insulating layer separating the gate electrode from the active layer, and a carrier modification device that reduces short channel effects by reducing carrier concentration variations in the active layer. The carrier modification device may include a capping layer in contact with the active layer that acts to increase a carrier concentration in the active layer. Alternatively, the carrier modification device may include a first injection layer in contact with the source electrode and the active layer separating the source electrode from the active layer, and a second injection layer in contact with the drain electrode and the active layer separating the drain electrode from the active layer. The first and second injection layers may act to reduce a carrier concentration within the active layer near the source electrode and the drain electrode.

Abstract: A semiconductor device includes a gate, a semiconductor structure, a gate insulating layer, a first source/drain feature and a second source/drain feature. The gate insulating layer is located between the gate and the semiconductor structure. The semiconductor structure includes at least one first metal oxide layer, a first oxide layer, and at least one second metal oxide layer. The first oxide layer is located between the first metal oxide layer and the second metal oxide layer. The first source/drain feature and the second source/drain feature are electrically connected with the semiconductor structure.

Abstract: An encoder determines, based on a width and a height of a block, whether or not to disable a prediction mode in which the block is split along a partitioning line defined by a distance and an angle and then prediction is performed; and encodes the block with the prediction mode disabled or not disabled according to a result of the determination on whether or not to disable the prediction mode. Here, the distance is the shortest distance between the center of the block and the partitioning line, and the angle is an angle representing a direction from the center of the block toward the partitioning line in the shortest distance. The encoder determines to disable the prediction mode when (i) a width-to-height ratio is at least 8 or (ii) a height-to-width ratio is at least 8.

Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry, in operation: determines whether a size of a current block, which is a unit for which a vector candidate list including vector candidates is generated, is less than or equal to a threshold; when the size of the current block is less than or equal to the threshold, generates the vector candidate list by registering a history-based motion vector predictor (HMVP) vector candidate in the vector candidate list from an HMVP table without performing a first pruning process; when the size of the current block is greater than the threshold, generates the vector candidate list by performing the first pruning process and registering the HMVP vector candidate in the vector candidate list from the HMVP table; and encodes the current block using the vector candidate list.

Abstract: An image decoder includes circuitry and a memory, wherein the circuitry, in operation, calculates first values of a first partition in a current block, using a first motion vector for the first partition; calculates second values of a second partition in the current block, using a second motion vector for the second partition; calculates third values of a set of pixels between the first partition and the second partition, using the first motion vector; calculates fourth values of the set of pixels, using the second motion vector; and weights the third values and the fourth values. A number of pixels in a row in the set of pixels is two or more, and two or more weights applied to the third values increase along the row.

Abstract: Some embodiments relate to a thin film transistor comprising an active layer over a substrate. An insulator is stacked with the active layer. A gate electrode structure is stacked with the insulator and includes a gate material layer having a first work function and a first interfacial layer. The first interfacial layer is directly between the insulator and the gate material layer, wherein the gate electrode structure has a second work function that is different from the first work function.

Abstract: An encoder includes circuitry and a memory coupled to the circuitry. The circuitry, in operation, determines whether or not a ternary split process of splitting a block into three sub blocks in a first direction parallel to a first longer side of the block is allowed by comparing a size of a second shorter side of the block to a minimum threshold value. The circuitry, responsive to the ternary split process being allowed, writes, into a bitstream, a split direction parameter indicative of a splitting direction. The circuitry, in operation, splits the block into a plurality of sub blocks in a direction indicated by the split direction parameter; and encodes the plurality of sub blocks. The minimum threshold value corresponds to a minimum size supported in a transform process.

Abstract: An image encoder/decoder includes circuitry and a memory coupled to the circuitry. When a geometry of a block of a picture satisfies a first condition, the circuitry splits the block of the picture into sub blocks having a first set of geometries. When the geometry of the block does not satisfy the first condition, the circuitry splits the block of the picture into sub blocks having a second set of geometries, the second set of geometries being different from the first set of geometries. The circuitry encodes/decodes the sub blocks of the block.