Abstract: The present disclosure relates to dynamically updating a delay line code. A method for updating the delay line code may include receiving a strobe input at a coarse delay line. The method may further include receiving a coarse delay cell code at the coarse delay line. The method may also include generating a first clock path based upon a first chain of interleaved logic gates included within the coarse delay line. The method may additionally include generating a second clock path based upon a second chain of interleaved logic gates included within the coarse delay line. The method may further include receiving the first clock path, and the second clock path, and a fine delay cell code at a fine delay cell. The method may also include generating a strobe delayed output based upon the first clock path, and the second clock path, and the fine delay code.

Abstract: A device, a memory interface device, and a method of implementing an active inductor circuit are disclosed. In one aspect, the device includes one or more active inductor circuits, each including a first metal-oxide-semiconductor (MOS) transistor and a second MOS transistor. The first MOS transistor has a first terminal connected to a first voltage level, a second terminal connected to a resistor, and a gate terminal. The second MOS transistor has a first terminal connected to the first voltage level, a second terminal connected to a first current source and the gate terminal of the first MOS transistor, and a gate terminal connected to the resistor and to a capacitor connected to a second voltage level. One of the first MOS transistor and the second MOS transistor is a p-channel MOS (PMOS) transistor, and another of the first MOS transistor and the second MOS transistor is an n-channel MOS (NMOS) transistor.

Abstract: This disclosure relates to slew rate boosting for communication interfaces. A circuit can include a driver circuit coupled to an output node and configured to provide a data signal to the output node based on an input signal. The data signal can a similar logical state as the input signal. The circuit can include a signal transition boosting circuit coupled to the output node and configured to provide a boosting signal to the output node based on the input signal and a charge pump delay adjustment signal. The charge pump delay adjustment signal can define an amount of time after which the boosting signal is provided to the output node. The boosting signal can be provided to the output node to signal boost the data signal for the amount of time defined by the charge pump delay adjustment signal to provide a boosted data signal at the output node.

Abstract: In some examples, a time-based equalizer can be configured to receive an input signal from a channel. The input signal can be distorted by previously received input signals transmitted over the channel. The time-based equalizer can be configured to compensate for distortions in the input signal caused by at least one previously received input signal to provide an ISI compensated input signal. The time-based equalizer can be configured to compensate for the distortions by edge time shifting respective edges of the input signal in time over a time interval for detecting the input signal to new edge time locations based on a feedback signal and edge movement signals. The feedback signal can be generated based on at least one previously received input signal.

Abstract: Disclosed are methods and circuits that support different on-die termination (ODT) schemes for a plurality of signaling schemes using a relatively small number of external calibration pads. These methods and circuits develop control signals for calibrating any of multiple termination schemes that might be used by associated communication circuits. The ODT control circuits, entirely or predominantly instantiated on-die, share circuit resources employed in support of the different termination schemes to save die area.

Abstract: Disclosed are methods and circuits that support different on-die termination (ODT) schemes for a plurality of signaling schemes using a relatively small number of external calibration pads. These methods and circuits develop control signals for calibrating any of multiple termination schemes that might be used by associated communication circuits. The ODT control circuits, entirely or predominantly instantiated on-die, share circuit resources employed in support of the different termination schemes to save die area.