Patents by Inventor Hajime Kawamura

Hajime Kawamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240153248
    Abstract: A storage unit stores therein first inference results respectively corresponding to a plurality of face images, which are output from a first model of outputting a first inference result in response to an input of a face image. A processing unit selects, from the plurality of face images, first and second face images whose distance calculated based their first inference results exceeds a threshold. The processing unit performs machine learning to train a second model of outputting a second inference result in response to an input of a face image, using a third face image obtained by combining the first and second face images.
    Type: Application
    Filed: August 1, 2023
    Publication date: May 9, 2024
    Applicants: Fujitsu Limited, OSAKA UNIVERSITY
    Inventors: Ryosuke KAWAMURA, Noriko IKEMOTO TAKEMURA, Hajime NAGAHARA
  • Publication number: 20240092307
    Abstract: An actuator of an airbag device includes a main body portion, which is attached to an attachment base, and a cap including a fitting protruding portion that is inserted into a fitting recessed portion of the main body portion. The fitting protruding portion has a holding portion, which is inserted into a holding hole of a coupling member when fitted to the main body portion and holds a leading end portion of the coupling member, and a movement permitting unit that, when a ceiling portion of the cap is subjected to pressure of a combustion gas of a squib, causes the ceiling portion to move, and causes the holding portion to move from a holding position, wherein the holding portion is inserted into the holding hole of the coupling member, to a holding released position, wherein the holding portion is removed from the holding hole.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 21, 2024
    Inventors: Yusuke KAWAMURA, Keigo KIMURA, Koji KAWAMURA, Hajime KITTE, Yoshio ONO
  • Publication number: 20240067210
    Abstract: A driving control system 1 includes a camera unit 11 and a transceiver 18 which are mounted to a vehicle 5. The driving control system 1 also includes a transceiver 74, an information recognition_ECU 72 which recognizes road traffic information based on first road traffic detection information received by the transceiver 74 through the transceiver 18, and a traveling_ECU 73 which computes control information for the vehicle 5 based on the road traffic information, which are provided to a traffic control apparatus 70 disposed in each predetermined traffic control area. The driving control system 1 also includes an E/G_ECU 23, a PS_ECU 24, and a BK_ECU 25 which are mounted to the vehicle 5 and execute driving control based on the control information received by the transceiver 18 through the transceiver 74.
    Type: Application
    Filed: December 23, 2021
    Publication date: February 29, 2024
    Applicant: SUBARU CORPORATION
    Inventors: Hajime OYAMA, Kengo KOBAYASHI, Norikazu EBISAWA, Yasuhiro TAKAHASHI, Hiroaki KAWAMURA, Masaru NAKANISHI
  • Publication number: 20240071223
    Abstract: A travelling control system includes a plurality of vehicles each including a controller, a server including a generator configured to generate a travelling control information for the plurality of vehicles, a predictor configured to predict a merging interference between a first vehicle travelling from a merging road toward a main road and a second vehicle travelling on the main road, a sender which is provided in the first vehicle to send an interference suppressing request, and a receiver which is provided in the second vehicle to receive the interference suppressing request. The controller of the second vehicle travelling on the main road is configured to execute interference suppressing control of suppressing an approach of the second vehicle to the first vehicle travelling from the merging road to the main road, in a case that the receiver receives the interference suppressing request from the first vehicle.
    Type: Application
    Filed: December 24, 2021
    Publication date: February 29, 2024
    Inventors: Hajime OYAMA, Masato MIZOGUCHI, Ryosuke NAMBA, Hiroaki KAWAMURA, Norikazu EBISAWA, Kengo KOBAYASHI, Masaru NAKANISHI
  • Publication number: 20230302726
    Abstract: A method of manufacturing a resin formed product having a leather grain includes: a 3D printing step of inputting printing data to a 3D printer, and printing an intermediate product having an intermediate grain that is a base of the leather grain; and a post processing step of obtaining the resin formed product, which is a finished product, by carrying out post processing on the intermediate product printed in the 3D printing step. A grain height in input data, which is the printing data inputted in the 3D printing step, is greater than or equal to 120% of a stacking pitch in the 3D printing step.
    Type: Application
    Filed: March 24, 2023
    Publication date: September 28, 2023
    Inventors: Ryota MASUDA, Kohei MUTAI, Hajime KAWAMURA, Hiroyuki IKENO, Kazuo IGARASHI, Satoru NISHIMOTO
  • Patent number: 9441672
    Abstract: A method for producing a holder in which sagging is suppressed in a bent part to be formed into a flange portion, without using bulge forming and a split mold that restrains the inside of a working target article; and a holder. An upper punch presses and bends one end portion of a working target article inward, whereby a flange portion is formed in the one end portion. A smaller-diameter portion of the working target article is restrained from the inside and outside by a lower punch and split mold portions. Then, a peripheral surface portion of a convex portion of the upper punch receives the end portion of the working target article and applies an outward pressure to the end portion. A bent part is pushed toward a larger-diameter portion restraining part of a split die, so that sagging is prevented from occurring in the bent part.
    Type: Grant
    Filed: March 6, 2013
    Date of Patent: September 13, 2016
    Assignee: NTN CORPORATION
    Inventors: Yoshiya Mano, Hiroshi Nakahashi, Kouhei Kondou, Hajime Kawamura, Shingo Kinpara, Yasunori Yamamoto
  • Publication number: 20150036961
    Abstract: A method for producing a holder in which sagging is suppressed in a bent part to be formed into a flange portion, without using bulge forming and a split mold that restrains the inside of a working target article; and a holder. An upper punch presses and bends one end portion of a working target article inward, whereby a flange portion is formed in the one end portion. A smaller-diameter portion of the working target article is restrained from the inside and outside by a lower punch and split mold portions. Then, a peripheral surface portion of a convex portion of the upper punch receives the end portion of the working target article and applies an outward pressure to the end portion. A bent part is pushed toward a larger-diameter portion restraining part of a split die, so that sagging is prevented from occurring in the bent part.
    Type: Application
    Filed: March 6, 2013
    Publication date: February 5, 2015
    Inventors: Yoshiya Mano, Hiroshi Nakahashi, Kouhei Kondou, Hajime Kawamura, Shingo Kinpara, Yasunori Yamamoto
  • Publication number: 20090140769
    Abstract: A System-in-Package includes a first chip to be mounted in common for a plurality of product types, a second chip having different specifications for each product type, and a wiring substrate being common to a plurality of product types, on which the first chip and the second chip are to be mounted. A setting signal is supplied from the second chip to the first chip.
    Type: Application
    Filed: November 5, 2008
    Publication date: June 4, 2009
    Applicant: NEC Electronics Corporation
    Inventors: Katsunobu Suzuki, Takao Ikeuchi, Fumihiko Tajima, Kazuaki Maehara, Hajime Kawamura, Makoto Wakasugi
  • Patent number: 5801956
    Abstract: A logic circuit design procedure comprises a step of deciding the feasibility of hardware after HDL description and functional verification, and a step of performing logic synthesis of the HDL description which has been determined to be feasible. The feasibility decision step comprises at least a decision on the possibility of spike transfer and a decision on oscillation. The spike transfer check step determines whether at least one of a clock signal and a reset signal of any sequential circuit is output from a combinational circuit. The oscillation check step determines whether an output signal of any combinational circuit is recursively input thereto without passing through a sequential circuit. Only the HDL description which passes the feasibility test is allowed to enter the logic synthesis stage.
    Type: Grant
    Filed: June 20, 1996
    Date of Patent: September 1, 1998
    Assignee: NEC Corporation
    Inventors: Hajime Kawamura, Takeharu Nemoto, Takuo Nakaki
  • Patent number: 5757775
    Abstract: An interface between an ATM network and a local network includes a cell disassembler for disassembling ATM cells from the ATM network and transmitting a disassembled signal to the local network. A cell assembler assembles a signal from the local network into ATM cells and transmitting the ATM cells to the ATM network. A cell loss detector is provided for detecting a loss of a cell in a series of ATM cells from the ATM network. A signaling cell detector detects a call setup ATM cell from the ATM network. A coincidence gate produces an output when there is a coincidence between the detection of the cell loss and the detection of the call setup ATM cell. When the coincidence is detected, a busy tone is supplied to the cell assembler, where it is assembled into ATM cells and transmitted to the ATM network.
    Type: Grant
    Filed: June 14, 1996
    Date of Patent: May 26, 1998
    Assignee: NEC Corporation
    Inventors: Masaru Yokoyama, Hajime Kawamura
  • Patent number: 5500862
    Abstract: In a digital circuit board comprising a circuit mounting section and a test pattern section, the circuit mounting section has a circuit upper face on which the edge connector and an LSI circuit are mounted. The circuit mounting section has a circuit back face opposite to the circuit upper face. The circuit mounting section has a plurality of terminal through holes, the connector terminals including connector test terminals for use in testing the LSI circuit, and the LSI terminals including LSI test terminals for use in testing the LSI circuit. The terminal through holes have ends connected to the connector test terminals and to the LSI test terminals and have another ends which reach to the circuit back face. The test pattern section has a test upper face which is in contact with the circuit back face and on which test conductive patterns are formed.
    Type: Grant
    Filed: October 28, 1994
    Date of Patent: March 19, 1996
    Assignee: NEC Corporation
    Inventor: Hajime Kawamura
  • Patent number: 5343466
    Abstract: In a path routing system for a communication network having a plurality of nodes and a plurality of transmission lines, an originate node transmits a routing message with a transmission line attribute designation to a bypass node for establishing a path between the originate node and a terminal node. A repeater node searches for a transmission line having the same attribute as the transmission line attribute designation upon receipt of the routing message with the transmission line attribute designation, and transmits the message to an adjacent node through the searched transmission line. A path between the originate node and the terminal node is autonomously selected to pass through transmission lines having the desired attribute by repeatably searching the transmission lines and transmitting the message between nodes disposed between the originate node and the terminal node.
    Type: Grant
    Filed: February 19, 1993
    Date of Patent: August 30, 1994
    Assignee: NEC Corporation
    Inventor: Hajime Kawamura
  • Patent number: 5283323
    Abstract: The present invention discloses a process for enhancing antibody response to an antigen. A novel step in the process is the preparation of a conjugate of the antigen with an anti-immunoglobulin. The conjugate thus prepared is then administered to a host for in vivo effect or presented to T and B cells in a suitable culture system for in vitro response. The present invention by increasing immunogenicity makes it possible to produce antibodies against very low doses of antigens and otherwise weak or insufficient antigens or synthetic vaccines.
    Type: Grant
    Filed: June 18, 1991
    Date of Patent: February 1, 1994
    Assignee: The United States of America as represented by the Department of Health and Human Services
    Inventors: Jay A. Berzofsky, Hajime Kawamura
  • Patent number: 5130974
    Abstract: A data communication system comprises a network management center and switching nodes which are interconnected by regular and spare routes. Each of the regular and spare routes comprises data channels and a control chnanel, the data channels of the regular routes forming a data network for carrying signals to and from user terminals and the control channel of each regular or spare route is connected to the control channels of other regular or spare routes to form a control network of multidrop structure for carrying a network management signal from the center to the nodes as well as network response signals from the nodes to the center.
    Type: Grant
    Filed: March 30, 1990
    Date of Patent: July 14, 1992
    Assignee: NEC Corporation
    Inventors: Hajime Kawamura, Keisuke Kuroyanagi