Patents by Inventor Hajime Watakabe
Hajime Watakabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10211235Abstract: The purpose of the present invention is to form both LTPS TFT and Ply-Si TFT on a same substrate. The feature of the display device to realize the above purpose is that: a display device comprising: a substrate including a first TFT having an oxide semiconductor layer and a second TFT having a Poly-Si layer, an undercoat is formed on the substrate, the oxide semiconductor layer is formed on or above the undercoat, a first interlayer insulating film is formed on or above the oxide semiconductor layer, the Poly-Si layer is formed on or above the first interlayer insulating film.Type: GrantFiled: August 16, 2017Date of Patent: February 19, 2019Assignee: Japan Display Inc.Inventors: Isao Suzumura, Hajime Watakabe, Akihiro Hanada, Hirokazu Watanabe
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Publication number: 20190041932Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first semiconductor layer formed of silicon and positioned above the insulating substrate, a second semiconductor layer formed of a metal oxide and positioned above the first semiconductor layer, a first insulating film formed of a silicon nitride and positioned between the first semiconductor layer and the second semiconductor layer, and a block layer positioned between the first semiconductor film and the second semiconductor layer, the block layer hydrogen diffusion of which is lower than that of the first insulating film.Type: ApplicationFiled: September 14, 2018Publication date: February 7, 2019Applicant: Japan Display Inc.Inventors: Akihiro HANADA, Hajime Watakabe, Kazufumi Watabe
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Publication number: 20180342536Abstract: The purpose of the invention is to form a flexible display device where the substrate is made of resin, wherein the TFT can be annealed in high temperature; consequently, a reliability of the TFT is improved. The concrete measure is as follows. A display device having a pixel electrode and a TFT including a semiconductor layer on a substrate comprising: a source region of the semiconductor layer connects with a source electrode, a drain region of the semiconductor layer connects with a drain electrode; the pixel electrode connects with the source electrode; the drain electrode connects with a video signal line; a distance between the drain electrode and the substrate is smaller than a distance between the semiconductor and the substrate, the semiconductor layer is formed between the pixel electrode and the substrate.Type: ApplicationFiled: May 14, 2018Publication date: November 29, 2018Applicant: Japan Display Inc.Inventors: Isao Suzumura, Hajime Watakabe, Akihiro Hanada, Hirokazu Watanabe, Yohei Yamaguchi, Marina Shiokawa, Ryotaro Kimura
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Patent number: 10115740Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first semiconductor layer formed of silicon and positioned above the insulating substrate, a second semiconductor layer formed of a metal oxide and positioned above the first semiconductor layer, a first insulating film formed of a silicon nitride and positioned between the first semiconductor layer and the second semiconductor layer, and a block layer positioned between the first semiconductor film and the second semiconductor layer, the block layer hydrogen diffusion of which is lower than that of the first insulating film.Type: GrantFiled: January 13, 2017Date of Patent: October 30, 2018Assignee: Japan Display Inc.Inventors: Akihiro Hanada, Hajime Watakabe, Kazufumi Watabe
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Publication number: 20180286890Abstract: The purpose of the invention is to improve reliability of the TFT of the oxide semiconductor. The invention is characterized as follows. A display device comprising: a substrate including a display area where plural pixels are formed, the pixel includes a first TFT of a first oxide semiconductor; a first gate insulating film is formed on the first oxide semiconductor, a gate electrode is formed on the first gate insulating film, an interlayer insulating film is formed over the gate electrode; the gate insulating film includes a first silicon oxide film, the gate electrode includes a first gate layer made of a second oxide semiconductor and a second gate layer made of metal or alloy; the interlayer insulating film has a first interlayer insulating film including a second silicon oxide film, and a second interlayer insulating film including a first aluminum oxide film on the first interlayer insulating film.Type: ApplicationFiled: March 16, 2018Publication date: October 4, 2018Applicant: Japan Display Inc.Inventors: Isao Suzumura, Yohei Yamaguchi, Hajime Watakabe, Akihiro Hanada, Hirokazu Watanabe, Marina Shiokawa
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Publication number: 20180122835Abstract: A display device comprising: a first TFT using silicon (Si) and a second TFT using oxide semiconductor are formed on a substrate, a distance between the silicon (Si) and the substrate is smaller than a distance between the oxide semiconductor and the substrate, a drain source electrode of the first TFT connects with the silicon (Si) via a first through hole, a drain source electrode of the second TFT connects with the oxide semiconductor via a second through hole, metal films are made on the oxide semiconductor sandwiching a channel of the oxide semiconductor in a plan view, the channel has a channel width, an ALO layer is formed on the metal films and the oxide semiconductor, the second source drain electrode and the metal films are connected via the second through hole formed in the AlO layer.Type: ApplicationFiled: October 3, 2017Publication date: May 3, 2018Inventors: Hajime WATAKABE, Isao SUZUMURA, Hirokazu WATANABE, Akihiro HANADA
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Patent number: 9947795Abstract: According to one embodiment, a thin-film transistor includes a first insulating film, an oxide semiconductor layer provided on the first insulating film and a second insulating film provided on the oxide semiconductor layer, and at least one of the first insulating film and the second insulating film includes a first region in contact with the oxide semiconductor layer and a second region further distant from the oxide semiconductor layer than the first region, and the second region has an argon concentration higher than that of the first region.Type: GrantFiled: December 22, 2016Date of Patent: April 17, 2018Assignee: Japan Display Inc.Inventors: Hajime Watakabe, Tomoyuki Ariyoshi, Akihiro Hanada
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Publication number: 20180076239Abstract: The purpose of the present invention is to form both LTPS TFT and Ply-Si TFT on a same substrate. The feature of the display device to realize the above purpose is that: a display device comprising: a substrate including a first TFT having an oxide semiconductor layer and a second TFT having a Poly-Si layer, an undercoat is formed on the substrate, the oxide semiconductor layer is formed on or above the undercoat, a first interlayer insulating film is formed on or above the oxide semiconductor layer, the Poly-Si layer is formed on or above the first interlayer insulating film.Type: ApplicationFiled: August 16, 2017Publication date: March 15, 2018Inventors: Isao SUZUMURA, Hajime Watakabe, Akihiro Hanada, Hirokazu Watanabe
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Patent number: 9911859Abstract: According to one embodiment, a thin-film transistor and a method of manufacturing the same achieve size reduction of the thin-film transistor while using an oxide semiconductor layer. The oxide semiconductor layer includes a channel region, a source region, and a drain region. A gate electrode is arranged at a position spaced from the channel region of the oxide semiconductor layer so as to face the channel region. A source electrode is electrically connected to the source region of the oxide semiconductor layer. A drain electrode is electrically connected to the drain region of the oxide semiconductor layer. An undercoat layer adjoins the source region and the drain region of the oxide semiconductor layer. A hydrogen blocking layer has a hydrogen concentration lower than that in the undercoat layer and separates the undercoat layer and the channel region of the oxide semiconductor layer.Type: GrantFiled: November 18, 2015Date of Patent: March 6, 2018Assignee: Japan Display Inc.Inventors: Hajime Watakabe, Arichika Ishida, Takashi Okada, Masayoshi Fuchi, Akihiro Hanada
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Publication number: 20180013006Abstract: According to one embodiment, a semiconductor device includes contact holes passing through a source region of a drain region of an interlayer insulating film and oxide semiconductor layer to reach an insulating substrate, wherein a source electrode and a drain electrode are formed inside the contact holes, respectively.Type: ApplicationFiled: September 22, 2017Publication date: January 11, 2018Applicant: Japan Display Inc.Inventors: Miyuki ISHIKAWA, Arichika ISHIDA, Masayoshi FUCHI, Hajime WATAKABE, Takashi OKADA
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Publication number: 20170365624Abstract: A semiconductor device includes a oxide semiconductor layer, a gate electrode arranged above the oxide semiconductor layer, a gate insulation layer between the oxide semiconductor layer and the gate electrode, a first insulation layer arranged above the oxide semiconductor layer and arranged with a first aperture part, wiring including an aluminum layer arranged above the first insulation layer, the wiring being electrically connected to the oxide semiconductor layer via the first aperture part, a barrier layer including aluminum oxide above the first insulation layer, above the wiring and covering a side surface of the wiring, and an organic insulation layer arranged above the barrier layer.Type: ApplicationFiled: June 12, 2017Publication date: December 21, 2017Inventors: Toshinari Sasaki, Hajime Watakabe, Akihiro Hanada, Marina Shiokawa
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Patent number: 9831349Abstract: According to one embodiment, a semiconductor device includes contact holes passing through a source region of a drain region of an interlayer insulating film and oxide semiconductor layer to reach an insulating substrate, wherein a source electrode and a drain electrode are formed inside the contact holes, respectively.Type: GrantFiled: May 29, 2015Date of Patent: November 28, 2017Assignee: Japan Display Inc.Inventors: Miyuki Ishikawa, Arichika Ishida, Masayoshi Fuchi, Hajime Watakabe, Takashi Okada
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Patent number: 9780227Abstract: According to one embodiment, a thin-film transistor and a method of manufacturing the thin-film transistor provided herein achieve enhanced reliability by preventing a disconnection in a gate insulating film at a position corresponding to an end surface of an oxide semiconductor layer. The oxide semiconductor layer includes a channel region, a source region, and a drain region. The channel region is placed between the source region and the drain region. The gate insulating film covers the oxide semiconductor layer in a range from at least a part of an upper surface to an end surface continuous with the upper surface of the oxide semiconductor layer. The oxide semiconductor layer is formed so as to have an oxygen concentration that becomes lower from a top side to a bottom side and the end surface is inclined so as to diverge from the top side to the bottom side.Type: GrantFiled: November 18, 2015Date of Patent: October 3, 2017Assignee: Japan Display Inc.Inventors: Akihiro Hanada, Masayoshi Fuchi, Hajime Watakabe, Takashi Okada, Arichika Ishida
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Publication number: 20170207245Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first semiconductor layer formed of silicon and positioned above the insulating substrate, a second semiconductor layer formed of a metal oxide and positioned above the first semiconductor layer, a first insulating film formed of a silicon nitride and positioned between the first semiconductor layer and the second semiconductor layer, and a block layer positioned between the first semiconductor film and the second semiconductor layer, the block layer hydrogen diffusion of which is lower than that of the first insulating film.Type: ApplicationFiled: January 13, 2017Publication date: July 20, 2017Applicant: Japan Display Inc.Inventors: Akihiro HANADA, Hajime WATAKABE, Kazufumi WATABE
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Publication number: 20170200829Abstract: According to one embodiment, a thin-film transistor includes a first insulating film, an oxide semiconductor layer provided on the first insulating film and a second insulating film provided on the oxide semiconductor layer, and at least one of the first insulating film and the second insulating film includes a first region in contact with the oxide semiconductor layer and a second region further distant from the oxide semiconductor layer than the first region, and the second region has an argon concentration higher than that of the first region.Type: ApplicationFiled: December 22, 2016Publication date: July 13, 2017Applicant: Japan Display Inc.Inventors: Hajime WATAKABE, Tomoyuki ARIYOSHI, Akihiro HANADA
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Publication number: 20170162715Abstract: According to one embodiment, a method of manufacturing a thin film transistor, includes forming an island-like first insulating layer containing oxygen above an insulating substrate, forming an oxide semiconductor layer above the insulating substrate and the first insulating layer and in contact with the first insulating layer, and performing heat treatment to supply oxygen from the first insulating layer to an overlapping area of the oxide semiconductor layer, which is overlaid on the first insulating layer.Type: ApplicationFiled: December 7, 2016Publication date: June 8, 2017Applicant: Japan Display Inc.Inventors: Takashi OKADA, Masayoshi FUCHI, Hajime WATAKABE, Akihiro HANADA
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Patent number: 9412334Abstract: According to one embodiment, a liquid crystal display device includes an array substrate including a first color filter configured to transmit light in a first wavelength range, a second color filter configured to transmit light in a second wavelength range of greater wavelengths than the first wavelength range, a first switching element disposed above the second color filter, a second switching element disposed above the second color filter, a first pixel electrode which is electrically connected to the first switching element and is located above the first color filter, and a second pixel electrode which is electrically connected to the second switching element and is located above the second color filter.Type: GrantFiled: February 27, 2015Date of Patent: August 9, 2016Assignee: JAPAN DISPLAY INC.Inventors: Hajime Watakabe, Arichika Ishida, Masato Hiramatsu
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Publication number: 20160149047Abstract: According to one embodiment, a thin-film transistor and a method of manufacturing the same achieve size reduction of the thin-film transistor while using an oxide semiconductor layer. The oxide semiconductor layer includes a channel region, a source region, and a drain region. A gate electrode is arranged at a position spaced from the channel region of the oxide semiconductor layer so as to face the channel region. A source electrode is electrically connected to the source region of the oxide semiconductor layer. A drain electrode is electrically connected to the drain region of the oxide semiconductor layer. An undercoat layer adjoins the source region and the drain region of the oxide semiconductor layer. A hydrogen blocking layer has a hydrogen concentration lower than that in the undercoat layer and separates the undercoat layer and the channel region of the oxide semiconductor layer.Type: ApplicationFiled: November 18, 2015Publication date: May 26, 2016Applicant: Japan Display Inc.Inventors: Hajime Watakabe, Arichika Ishida, Takashi Okada, Masayoshi Fuchi, Akihiro Hanada
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Publication number: 20160149046Abstract: According to one embodiment, a thin-film transistor and a method of manufacturing the thin-film transistor provided herein achieve enhanced reliability by preventing a disconnection in a gate insulating film at a position corresponding to an end surface of an oxide semiconductor layer. The oxide semiconductor layer includes a channel region, a source region, and a drain region. The channel region is placed between the source region and the drain region. The gate insulating film covers the oxide semiconductor layer in a range from at least a part of an upper surface to an end surface continuous with the upper surface of the oxide semiconductor layer. The oxide semiconductor layer is formed so as to have an oxygen concentration that becomes lower from a top side to a bottom side and the end surface is inclined so as to diverge from the top side to the bottom side.Type: ApplicationFiled: November 18, 2015Publication date: May 26, 2016Applicant: Japan Display Inc.Inventors: Akihiro HANADA, Masayoshi Fuchi, Hajime Watakabe, Takashi Okada, Arichika Ishiba
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Publication number: 20150380560Abstract: According to one embodiment, a semiconductor device includes contact holes passing through a source region of a drain region of an interlayer insulating film and oxide semiconductor layer to reach an insulating substrate, wherein a source electrode and a drain electrode are formed inside the contact holes, respectively.Type: ApplicationFiled: May 29, 2015Publication date: December 31, 2015Applicant: Japan Display Inc.Inventors: Miyuki ISHIKAWA, Arichika ISHIDA, Masayoshi FUCHI, Hajime WATAKABE, Takashi OKADA