Patents by Inventor Haldun Haznedar

Haldun Haznedar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6038383
    Abstract: A method for designing and fabricating an integrated circuit is disclosed. Signal line interconnect widths are determined by performing an electromigration analysis on a trial layout of the integrated circuit. A representative circuit for an integrated circuit is designed and a trial layout is created that includes a plurality of nets. A preprocessor 505 eliminates nets that do not need further validation. An extraction process 510 generates an RC network representation of each remaining net that is to be validated to form a distributed load simulation model. Distributed capacitance and resistance of signal lines is included with load capacitance of receivers to provide an accurate profile of current flow. A profile of current flowing in the signal line of each net is determined by simulating the operation of each net using simulator 517. Peak current, RMS current and average current is determined.
    Type: Grant
    Filed: October 13, 1997
    Date of Patent: March 14, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Duane J. Young, Francisco A. Cano, Nagaraj N Savithri, Haldun Haznedar