Abstract: A switch device can be configured to operate in a manner that was not originally intended. For example, a switch device can be a Broadcom XGS type of device that is configured with a packet-processing unit to perform line speed lookups in accordance with a default configuration. The default configuration can include classifying and forwarding received packets to an upstream interface based on VLAN information. The default configuration can be overwritten such that the switch device operates in a different manner than originally intended. For example, the switch device can be reconfigured to include mapping rules that specify different QoS data to be assigned to different type of received packets. Subsequent to utilizing the maps to identify QoS information for received packets, the reconfigured switch device uses the QoS information to forward the packets to queues in an upstream interface.

Abstract: A method, apparatus and computer program product for temporal-based flow distribution across multiple packet processors is presented. A packet is received and a hash identifier (ID) is computed for the packet. The hash ID is used to index into a State Table and to retrieve a corresponding record. When a time credit field of the record is zero then the time credit field is set to a to a new value; a Packet Processing Engine (PE) whose First-In-First-Out buffer (FIFO) has the lowest fill level is selected; and a PE number field in the state table record is updated with the selected PE number. When the time credit field of the record is non-zero then the packet is sent to a PE based on the value stored in the record; and the time credit field in the record is decremented if the time credit field is greater than zero.

Abstract: IPv6 longest prefix match lookups are implemented by splitting disjoint forwarding rules from non-disjoint forwarding rules and storing these forwarding rules in separate TCAMs. When an IPv6 address is received, the full IP address is passed to the TCAM containing the disjoint forwarding rules and the first n bits of the IP address are passed to the TCAM containing the non-disjoint forwarding rules. If a hit is received in the TCAM containing the disjoint forwarding rules, a result of the hit is used to implement a forwarding decision and the search in the TCAM containing the non-disjoint forwarding rules is terminated. If no hit is obtained from the disjoint TCAM, the search result of the non-disjoint TCAM is used. If a continue flag is set in the result received from the disjoint TCAM, a sub-trie based lookup is implemented based on the remaining m bits of the IPv6 address.

Abstract: A LAG/MLT ID is assigned to each LAG/MLT connecting to a switch cluster. Packets transmitted on the IST port are tagged with the LAG/MLT ID. Each switch in the switch cluster maintains a single MGID per VLAN ID. The MGID includes all IST ports as well as VLAN ID user port members. If a broadcast packet is received on an IST, any packet copy destined to the receiving IST port is dropped and any packet copy destined to a LAG/MLT port that matches the incoming tag is dropped. The LAG/MLT ID is preserved when the packet is sent to other IST ports and is removed when the packet is sent to a user port. By using a global ID for the LAG/MLT differentiated treatment of packets forwarded on the IST may be achieved using a single MGID per VLAN ID thus conserving resources.

Abstract: Control packets received at a network element are pre-classified to enable out of profile traffic to be traced to an offending port. Pre-classified control packets are metered at a desired granularity using dynamically configured meters which adjust as ports are put into service or removed from service, and as services are applied to ports. CPU metering is implemented on a per-CPU core basis, but the per-CPU meters are used to perform flow control rather than as thresholds for ejecting errant control traffic. The combination of these three aspects provides robust CPU overload protection while allowing appropriate levels of control traffic to be provided to the control plane for processing, even in the event of a control traffic burst on one or more ports of the network element.

Abstract: Application MGIDs defining virtual groups of output destinations are assigned by applications and appended to packets to specify on a per-application basis how packets associated with the application should be handed by a network element. The application MGIDs are mapped to single system MGID number space prior to being passed to the network element switch fabric. When a packet is passed to the switch fabric, the application MGID header is passed along with the system MGID header, so that the packet that is passed to the switch fabric has both the system MGID as well as the application MGID. The switch fabric only looks at the system MGID when forwarding the packet, however. Each egress node maintains a set of tables, one table for each application, in which the node maintains a list of ports per application MGID. The egress node uses the application MGID to key into the application table to determine a list of ports, at that egress node, to receive the packet.

Abstract: A bitmask array is implemented as a two dimensional bit array where each bit represents an allocated/free cell of the heap. Groups of bits of the bitmask array are assigned to implement commonly sized memory cell allocation requests. The heap manager keeps track of allocations by keeping separate lists of which groups are being used to implement commonly sized memory cell allocations requests by maintaining linked lists according to the number of cells allocated per request. Each list contains a list of the bit groups that have been used to provide allocations for particularly sized requests. By maintaining lists based on allocation size, the heap manager is able to cause new allocation requests to be matched up with previously retired allocations of the same size. Memory may be dynamically allocated between lists of differently sized memory requests.

Abstract: IPv6 longest prefix match lookups are implemented by splitting disjoint forwarding rules from non-disjoint forwarding rules and storing these forwarding rules in separate TCAMs. When an IPv6 address is received, the full IP address is passed to the TCAM containing the disjoint forwarding rules and the first n bits of the IP address are passed to the TCAM containing the non-disjoint forwarding rules. If a hit is received in the TCAM containing the disjoint forwarding rules, a result of the hit is used to implement a forwarding decision and the search in the TCAM containing the non-disjoint forwarding rules is terminated. If no hit is obtained from the disjoint TCAM, the search result of the non-disjoint TCAM is used. If a continue flag is set in the result received from the disjoint TCAM, a sub-trie based lookup is implemented based on the remaining m bits of the IPv6 address.

Abstract: A table based abstraction layer is interposed between applications and the packet forwarding hardware driver layer. All behavior and configuration of packet forwarding to be implemented in the hardware layer is articulated as fields in tables of the table based abstraction layer, and the higher level application software interacts with the hardware through the creation of and insertion and deletion of elements in these tables. The structure of the tables in the abstraction layer has no direct functional meaning to the hardware, but rather the tables of the table based abstraction layer simply exist to receive data to be inserted by the applications into the forwarding hardware. Information from the tables is extracted by the packet forwarding hardware driver layer and used to populate physical offset tables that may then be installed into the registers and physical tables utilized by the hardware to perform packet forwarding operations.

Abstract: A self adapting driver for controlling datapath hardware elements uses a generic driver and a configuration library to create a set of data structures and methods to map information provided by applications to physical tables. A set of virtual tables is implemented as an interface between the applications and the generic driver. The generic driver uses the configuration library to determine a mapping from the virtual tables to the physical tables. A virtual table schema definition is parsed to create the configuration library, such that changes to the physical infrastructure may be implemented as changes to the virtual table schema definition without adjusting the driver code. Thus automatically generated creation of generic packet forwarding drivers is able to be implemented through the use of a configuration language that defines the meaning of the information stored in the virtual tables.

Abstract: Prefix length memory tables are used to enable fast IPv4 LPM lookups using a single memory access for a first range of IP prefixes, and using two memory accesses for larger IP prefixes. Each of the prefix length memory tables is used to hold a set of forwarding rules associated with a different prefix length range. IP LPM operations are then performed in parallel in each of the prefix length memory tables of the set, and the forwarding rule matching the longest prefix is returned from each of the memory tables. A priority encoder is used to select between positive results from the multiple prefix length memory tables to enable the forwarding rule with the largest matching prefix to be used to key into the next hop forwarding table. The method utilizes low cost DDR SDRAM rather than TCAM, and also exhibits low overhead.

Abstract: A switch resource receives control plane packets and data packets. The control plane packets indicate how to configure the network in which the switch resource resides. The switch resource includes a classifier. The classifier classifies the control plane packets based on priority and stores the control plane packets into different packet priority queues. The switch resource also includes a flow controller. The forwarding manager selectively forwards the control plane packets stored in the control plane packet priority queues to a control plane packet processing environment depending on a completion status of processing previously forwarded control plane packets by a packet processing thread. The control plane packet processing environment includes a monitor resource that generates one or more interrupts to an operating system to ensure further forwarding of the packets downstream to the packet processing thread for timely processing.

Abstract: A method, apparatus and computer program product are presented. In a system having at least one Multi Link Trunk/Link Aggregation Group (MLT/LAG), a table is provided for each MLT/LAG, each table having at least one entry, each entry including at least two fields, a first field comprising a port member identification (ID) field and a second field comprising a port member status field. A port member status is checked for a port when a packet flow hashes into the table, and the status for the port member is determined. When the port member status is in a first state, then the associated port member ID is used as a destination port to transmit to. When the port member state is in a second state, then a next entry in the port table is accessed to find a next available entry having a port member status that is in the first state and the corresponding port member ID of the port member state that is in the first state is used as a destination port to transmit to. The first state is UP and the second state is DOWN.

Abstract: Each switch in a switch cluster is implemented as two logical switches—a logical UNI switch and a logical NNI switch implementing a Backbone Edge Bridge (BEB). The logical UNI switch handles forwarding to UNI receivers. The logical NNI switches are treated as independent switches by the SPB control plane and handle forwarding to NNI receivers. The two logical switches exchange packets through UNI/NNI and NNI/UNI translations (Mac-in-MAC encapsulation/decapsulation). The Inter-Switch Trunk is viewed as two logical channels—a UNI logical channel and an NNI logical channel. The logical UNI switch will forward packets having NNI receivers to the logical NNI switch. The logical NNI switch will forward packets having UNI receivers to the logical UNI switch only if the packet has a B-VID matching a B-VID assigned to the node of the switch cluster.

Abstract: An operating system adds an application signature as a tag in a packet header. In one embodiment the tag is inserted as a Q-tag in an Ethernet header. When a network element receives the tagged packet, it uses the tag alone or in combination with one or more additional header fields to map the packet to a network virtualization identifier segregating the application traffic on the network. Services are applied to packets according to network virtualization identifier to enable distributed application of services without requiring network elements to maintain state associated with packet flows.

Abstract: Key lookup operations are broken into two instructions: a Key Dispatch Instruction (KDI), and a Return Result Instruction (RRI). The thread uses KDI to dispatch key information to a selected coprocessor to initiate a key lookup operation. Upon dispatch of the key value to the coprocessor, the KDI is retired to enable the thread to continue to dispatch and retire addition instructions in the pipeline and does not go idle. Subsequently, the thread will issue a RRI to obtain the key lookup result from the coprocessor. While a thread is executing, it maintains, as part of its context, a busy flag per coprocessor in a scoreboard register and a return result register per coprocessor. KDI causes the corresponding busy flag in the scoreboard register to be set. When the key lookup operation is complete, the busy flag is cleared and the result is stored in the return result register.

Abstract: Packet processing is broken into two or more stages. In particular, the network processing unit 26 performs a first stage of packet processing related to packet forwarding and packet modification, and then performs a second stage of packet processing unrelated to packet forwarding and packet modification. Example processes unrelated to packet forwarding and packet modification may include state updates on the network element, such as statistics counter updates, stateful flow tracking, IPFix processing, MAC learning, and other processes important to operation of the network element, but which do not affect the appearance of the packet (e.g. packet format) and which do not affect the forwarding decision of the packet. Once the first stage of packet processing related to packet forwarding and packet modification has been completed, the flag associated with the packet is cleared in the scoreboard, to allow the packet to be transmitted from the reorder queue.

Abstract: A method, apparatus and computer program product for maintaining port state tables in a forwarding plane of a network element are presented. The state of a first set of ports associated with a first Forwarding Data Unit (FDU) are periodically determined, the first FDU being one of a plurality of FDUs. The determined state is used to update a first port state table of the port state database associated with the first FDU. The determined state is transmitted to each other FDUs on the network element to enable each of the other FDUs to store the state of the first set of ports in a port state database local to each of the other FDUs. The port state database is used by the forwarding plane to perform fast reroute of packets.

Abstract: Control packets received at a network element are pre-classified to enable out of profile traffic to be traced to an offending port. Pre-classified control packets are metered at a desired granularity using dynamically configured meters which adjust as ports are put into service or removed from service, and as services are applied to ports. CPU metering is implemented on a per-CPU core basis, but the per-CPU meters are used to perform flow control rather than as thresholds for ejecting errant control traffic. The combination of these three aspects provides robust CPU overload protection while allowing appropriate levels of control traffic to be provided to the control plane for processing, even in the event of a control traffic burst on one or more ports of the network element.

Abstract: Packets are colored and stored in a shared packet buffer without assigning fixed page allocations per port. The packet buffer is divided into three areas—an unrestricted area, an enforced area, and a headroom area. Regardless of the fullness level, when a packet is received it will be stored in the packet buffer. If the fullness level is in the unrestricted area, no flow control messages are generated. If the fullness level is in the enforced region, a probabilistic flow control generation process is used determine if a flow control messages will be generated. If the fullness level is in the headroom area, flow control is automatically generated. Quanta timers are used to control regeneration of flow control messages.