Abstract: A method includes: obtaining impact values for characteristic conditions; selecting training data subsets respectively from training data sets according to the impact values; obtaining a candidate model and an evaluation value based on the training data subsets; supplementing the training data subsets according to the impact values; obtaining another candidate model and another evaluation value based on training data subsets thus supplemented; repeating the step of supplementing the training data subset, and the step of obtaining another candidate model and another evaluation value based on the training data subsets thus supplemented; and selecting one of the candidate models as a prediction model based on the evaluation values.

Abstract: A method for performing automatic setting control of a memory device in predetermined communications architecture with aid of auxiliary setting management and associated apparatus are provided.

Abstract: The invention introduces an apparatus for segmenting a data stream, installed in a physical layer, to include a host interface, a data register and a boundary detector. The data register is arranged to operably store data received from the host side through the host interface. The boundary detector is arranged to operably detect the content of a data register. When the data register includes a special symbol, the boundary detector outputs a starting address that the special symbol is stored in the data register to an offset register to update a value stored in the offset register, thereby enabling a stream splitter to divide data bits of the data register according to the updated value of the offset register.

Abstract: A method for performing automatic setting control of a memory device in predetermined communications architecture with aid of auxiliary setting management and associated apparatus are provided.

Abstract: The invention introduces an apparatus for segmenting a data stream, installed in a physical layer, to include a host interface, a data register and a boundary detector. The data register is arranged to operably store data received from the host side through the host interface. The boundary detector is arranged to operably detect the content of a data register. When the data register includes a special symbol, the boundary detector outputs a starting address that the special symbol is stored in the data register to an offset register to update a value stored in the offset register, thereby enabling a stream splitter to divide data bits of the data register according to the updated value of the offset register.

Abstract: The invention introduces an apparatus for segmenting a data stream, installed in a physical layer, to include a host interface, a data register and a boundary detector. The data register is arranged to operably store data received from the host side through the host interface. The boundary detector is arranged to operably detect the content of the data register. When the data register includes a boundary-lock pattern or a special symbol, the boundary detector outputs a starting address that the boundary-lock pattern or the special symbol is stored in the data register to an offset register to update a value stored in the offset register, thereby enabling a stream splitter to divide data bits of the data register according to the updated value of the offset register.

Abstract: The invention introduces an apparatus for segmenting a data stream, installed in a physical layer, to include a host interface, a data register and a boundary detector. The data register is arranged to operably store data received from the host side through the host interface. The boundary detector is arranged to operably detect the content of the data register. When the data register includes a boundary-lock pattern or a special symbol, the boundary detector outputs a starting address that the boundary-lock pattern or the special symbol is stored in the data register to an offset register to update a value stored in the offset register, thereby enabling a stream splitter to divide data bits of the data register according to the updated value of the offset register.

Abstract: An embodiment of a method for accessing a storage unit of a flash memory, performed by a control unit, is disclosed to include at least the following steps. A transaction is appended to a bad-column table each time a bad column of a block within the storage unit is inspected. It is determined whether a total number of the transactions within the bad-column table is odd when the control unit determines that the last column of the block is a regular column. A transaction is appended to the bad-column table to indicate that the last column of the block is a bad column when the control unit determines that the total number of the transactions within the bad-column table is odd.

Abstract: An embodiment of a method for accessing a storage unit of a flash memory, performed by a control unit, is disclosed to include at least the following steps. A transaction is appended to a bad-column table each time a bad column of a block within the storage unit is inspected. It is determined whether a total number of the transactions within the bad-column table is odd when the control unit determines that the last column of the block is a regular column. A transaction is appended to the bad-column table to indicate that the last column of the block is a bad column when the control unit determines that the total number of the transactions within the bad-column table is odd.

Abstract: An image processing system includes a first image processing unit and a second image processing unit. The first image processing unit is utilized for receiving a plurality of images, and the first image processing unit divides a (K+N)th image into a plurality of regions according to a Kth image and a (K+M)th image, where K, M and N are positive integers and N is greater than M. The first image processing unit further transmits image data corresponding to a first region of the plurality of regions to the second image processing unit.

Abstract: An image processing system includes a receiving unit and an image processing unit, where the image processing unit includes a plurality of line buffers. The receiving unit is utilized for receiving a rectangular image. The image processing unit is coupled to the receiving unit, and is utilized for receiving at least a portion of the rectangular image transmitted from the receiving unit, where the first image processing unit receives the portion in a line-based manner, and a length of each line is equivalent to a length of a short side of the rectangular image. In particular, each line buffer of the image processing unit is utilized for storing pixel data of one line of the rectangular image.

Abstract: A controller includes a first USB interface, a second USB interface and a control circuit, where the first USB interface is utilized for connecting to a first personal computer host, and the second USB interface is utilized for connecting to a second personal computer host, and the control circuit is coupled to the first and second interfaces. The control circuit receives a control signal from the first personal computer host via the first USB interface, and transmits the control signal to the second personal computer host via the second USB interface to control operations of the second personal computer host.

Abstract: An image processing system includes a receiving unit and an image processing unit, where the image processing unit includes a plurality of line buffers. The receiving unit is utilized for receiving a rectangular image. The image processing unit is coupled to the receiving unit, and is utilized for receiving at least a portion of the rectangular image transmitted from the receiving unit, where the first image processing unit receives the portion in a line-based manner, and a length of each line is equivalent to a length of a short side of the rectangular image. In particular, each line buffer of the image processing unit is utilized for storing pixel data of one line of the rectangular image.

Abstract: An USB matrix switch system provided for a plurality of USB devices shared with a plurality of hosts is disclosed.

Abstract: A method of image processing for transforming an input image with a first resolution into an output image with a second resolution is provided. The input image is defined with a plurality of input pixels, and the output image is defined with a plurality of output pixels.

Abstract: An image processing system includes a first image processing unit and a second image processing unit. The first image processing unit is utilized for receiving a plurality of images, and the first image processing unit divides a (K+N)th image into a plurality of regions according to a Kth image and a (K+M)th image, where K, M and N are positive integers and N is greater than M. The first image processing unit further transmits image data corresponding to a first region of the plurality of regions to the second image processing unit.

Abstract: An USB matrix switch system provided for a plurality of USB devices shared with a plurality of hosts is disclosed.

Abstract: A method of image processing for transforming an input image with a first resolution into an output image with a second resolution is provided. The input image is defined with a plurality of input pixels, and the output image is defined with a plurality of output pixels.