Abstract: A method of operating an augmented reality (AR) system includes capturing images of a first real-world workspace using a camera of a first head mounted AR device of the AR system being worn by a first user, processing the images using a first processor of the AR system to identify physical objects in the first real-world workspace and detect 3D positions of the identified physical objects in a 3D space corresponding to the first real-world workspace, rendering virtual objects representing the identified physical objects on the display of the first head mounted AR device at the respective 3D positions for the identified physical objects, manipulating a first one of the virtual objects using at least one hand-held controller of the AR system in a manner that mimics a performance of a first procedural task using the physical object associated with the first one of the virtual objects, recording the manipulation of the first one of the virtual objects that mimics the performance of the first procedural task as fi

Abstract: A method of operating an augmented reality (AR) system includes capturing images of a first real-world workspace using a camera of a first head mounted AR device of the AR system being worn by a first user, processing the images using a first processor of the AR system to identify physical objects in the first real-world workspace and detect 3D positions of the identified physical objects in a 3D space corresponding to the first real-world workspace, rendering virtual objects representing the identified physical objects on the display of the first head mounted AR device at the respective 3D positions for the identified physical objects, manipulating a first one of the virtual objects using at least one hand-held controller of the AR system in a manner that mimics a performance of a first procedural task using the physical object associated with the first one of the virtual objects, recording the manipulation of the first one of the virtual objects that mimics the performance of the first procedural task as fi

Abstract: A method of operating an augmented reality (AR) system includes capturing images of a first real-world workspace using a camera of a first head mounted AR device of the AR system being worn by a first user, processing the images using a first processor of the AR system to identify physical objects in the first real-world workspace and detect 3D positions of the identified physical objects in a 3D space corresponding to the first real-world workspace, rendering virtual objects representing the identified physical objects on the display of the first head mounted AR device at the respective 3D positions for the identified physical objects, manipulating a first one of the virtual objects using at least one hand-held controller of the AR system in a manner that mimics a performance of a first procedural task using the physical object associated with the first one of the virtual objects, recording the manipulation of the first one of the virtual objects that mimics the performance of the first procedural task as fi

Abstract: A method of operating an augmented reality (AR) system includes capturing images of a first real-world workspace using a camera of a first head mounted AR device of the AR system being worn by a first user, processing the images using a first processor of the AR system to identify physical objects in the first real-world workspace and detect 3D positions of the identified physical objects in a 3D space corresponding to the first real-world workspace, rendering virtual objects representing the identified physical objects on the display of the first head mounted AR device at the respective 3D positions for the identified physical objects, manipulating a first one of the virtual objects using at least one hand-held controller of the AR system in a manner that mimics a performance of a first procedural task using the physical object associated with the first one of the virtual objects, recording the manipulation of the first one of the virtual objects that mimics the performance of the first procedural task as fi

Abstract: A new method is provided for the interface between a stress relieve interface layer of polyimide and a thereover created layer of mold compound. The invention provides for creating a pattern in the stress relieve layer of polyimide before the layer of mold compound is formed over the stress relieve layer of polyimide.

Abstract: A new method is provided for the interconnection of flip chips to a supporting substrate. The invention starts with a conventional first substrate, that serves as a semiconductor device support structure, over the surface of which a first pattern of contacts points has been provided. The invention then uses a second substrate, for instance a glass or quartz plate, and creates over the surface thereof a second pattern of solder bumps separated by solder non-wettable surfaces. The second pattern is a mirror image of the first pattern. By then overlying the first pattern of contact points with the second pattern of solder bumps, a step of reflow can be applied to the solder bumps, transferring the solder bumps from the second substrate to the contact points provided over the first substrate.

Abstract: A new method is provided for the interface between a stress relieve interface layer of polyimide and a thereover created layer of mold compound. The invention provides for creating a pattern in the stress relieve layer of polyimide before the layer of mold compound is formed over the stress relieve layer of polyimide.

Abstract: A new method is provided for the interface between a stress relieve interface layer of polyimide and a thereover created layer of mold compound. The invention provides for creating a pattern in the stress relieve layer of polyimide before the layer of mold compound is formed over the stress relieve layer of polyimide.

Abstract: Low stress concentration solder bumps are created on a semiconductor wafer by the removal of metal oxides on the edges of under bump metallurgy, (UBM). The removal of the oxides from the circular edge of the UBM allow the solder of the solder bump to wet the sides of the UBM, mainly the plated copper portion, thereby resulting in a solder bump structure with a filled undercut. This results in a lower stress concentration solder bump structure. This solder bump structure is obtained after the solder bumps have been reflowed on the wafer.

Abstract: A method for protecting a passivation layer during a solder bump formation process including providing a semiconductor process wafer having a process surface including at least two metal layers comprising an uppermost metal layer and a lowermost metal layer said lowermost metal layer overlying a passivation layer including metal bonding pad regions; photolithographically patterning and anisotropically etching through a first thickness portion of at least the uppermost metal layer to form a first patterned metal layer portion disposed over the metal bonding pad regions and reveal a second thickness portion including the lowermost metal layer; forming a solder bump over the first patterned metal layer portion according to at least a first reflow process; and, anisotropically etching through the second thickness portion surrounding the completely formed solder bump to reveal the passivation layer.

Abstract: Low stress concentration solder bumps are created on a semiconductor wafer by the removal of metal oxides of under bump metallurgy, (UBM). The removal of the oxides from the circular edge of the UBM allow the solder of the solder bump to wet the sides of the UBM, mainly the plated portion, thereby resulting in a solder bump structure with a filled undercut. This results in a lower stress concentration solder bump structure. This solder bump structure is obtained after the solder bumps have been reflowed on the wafer.

Abstract: An under bump metallurgy (UBM) structure is described. Two UBM mask processes are utilized. First, a top layer of copper (Cu) and/or a middle layer of nickel-vanadium (NiV) or chrome-copper (CrCu) is personalized by standard photoprocessing and etching steps utilizing a bump based size mask. This is followed by patterning an underlying seed layer with a second, larger mask, thereby preventing damage to the aluminum cap and seed layer undercut during the etching process.

Abstract: A method including providing a first substrate having a first bond pad and a second bond pad; forming a subassembly comprising securing a second substrate to the first substrate with a ground layer interposed between the first substrate and the second substrate; forming a first trench in the subassembly through the first substrate so that the trench is defined at least in part by a side wall of the first substrate and through at least a portion of the ground layer; and forming a first electrically conductive layer overlying the first bond pad, the side wall of the first substrate and overlying a portion of the ground layer.

Abstract: A method for protecting a passivation layer during a solder bump formation process including providing a semiconductor process wafer having a process surface including at least two metal layers comprising an uppermost metal layer and a lowermost metal layer said lowermost metal layer overlying a passivation layer including metal bonding pad regions; photolithographically patterning and anisotropically etching through a first thickness portion of at least the uppermost metal layer to form a first patterned metal layer portion disposed over the metal bonding pad regions and reveal a second thickness portion including the lowermost metal layer; forming a solder bump over the first patterned metal layer portion according to at least a first reflow process; and, anisotropically etching through the second thickness portion surrounding the completely formed solder bump to reveal the passivation layer.

Abstract: An under bump metallurgy (UBM) structure is described. Two UBM mask processes are utilized. First, a top layer of copper (Cu) and/or a middle layer of nickel-vanadium (NiV) or chrome-copper (CrCu) is personalized by standard photoprocessing and etching steps utilizing a bump based size mask. This is followed by patterning an underlying seed layer with a second, larger mask, thereby preventing damage to the aluminum cap and seed layer undercut during the etching process.

Abstract: A method of protecting the active surface, front side, of semiconductor wafers during the operations of backside grinding, transporting, and packaging has been achieved. The invention discloses a method for applying an organic passivation layer or an aqueous material for protection of the active components. These materials are easily removed prior to final packaging of the dies.

Abstract: An under bump metallurgy (UBM) structure is described. Two UBM mask processes are utilized. First, a top layer of copper (Cu) and/or a middle layer of nickel-vanadium (NiV) or chrome-copper (CrCu) is personalized by standard photoprocessing and etching steps utilizing a bump based size mask. This is followed by patterning an underlying seed layer with a second, larger mask, thereby preventing damage to the aluminum cap and seed layer undercut during the etching process.