Abstract: Embodiments of the disclosure relate to methods for metal gapfill with lower resistivity. Specific embodiments provide methods of forming a tungsten gapfill without a high resistance nucleation layer. Some embodiments of the disclosure utilize a nucleation underlayer to promote growth of the metal gapfill.

Abstract: A non-transitory medium of a device that stores instructions is provided. The instructions, when executed by a processing unit of the device, cause the device to: receive first motion information having a first list flag for a first reference frame and second motion information having a second list flag for a second reference frame for a block unit; compare the two list flags when a sub-block is included in a specific one of block regions covering a split line of the block unit; store a predefined one of the first and the second motion information for the sub-block without checking whether the two reference frames are included in a list indicated by a value different from the two list flags when the two list flags are the same; and store the first and the second motion information together for the sub-block when the two list flags are different.

Abstract: A magnetic random access memory (MRAM) structure is provided. The MRAM structure includes a first write electrode, a first magnetic tunnel junction (MTJ) stack, a voltage control electrode, a second MTJ stack, and a second write electrode. The first MTJ stack includes a first free layer disposed on the first write electrode, a first tunnel barrier layer disposed on the first free layer, and a first fixed layer disposed on the first tunnel barrier layer. The voltage control electrode is disposed on the first MTJ stack. The second MTJ stack includes a second fixed layer disposed on the voltage control electrode, a second tunnel barrier layer disposed on the second fixed layer, and a second free layer disposed on the second tunnel barrier layer. The second write electrode is disposed on the second MTJ stack.

Abstract: A duty cycle correction circuit includes a duty correction circuit, an information generation circuit and a duty control circuit. The duty correction circuit corrects a duty rate of an input clock signal based on a duty control code to generate an output clock signal. The information generation circuit compares a difference between operation power voltages based on an operation mode to generate voltage information. The duty control circuit receives the voltage information from the information generation circuit and generates the duty control code that includes the voltage information based on a duty rate of the output clock signal.

Abstract: The present invention discloses a multitype-adsorptive-group polycarboxylic acid water-reducing agent, consisting of 30-60 wt % of a macromolecule with multitype-adsorptive groups and water, the macromolecule with multitype-adsorptive groups has a polyethylene glycol side chain, and adsorption groups of the polymer backbone include a carboxylic acid group, a sulfonic acid group and a phosphoric acid group, the phosphoric acid group being linked to the backbone of the macromolecule with multitype-adsorptive groups by nucleophilic addition. The water-reducing agent of the present invention has significantly improved adaptability to different cements and aggregates while maintaining a high water reduction efficiency, compared with the conventional polycarboxylic acid water-reducing agent agent. It has a good water reducing efficiency in many different grades of cement, as well as a better resistance to aggregates containing more impurities such as machine-made sand.

Abstract: A printed circuit board includes: a core portion including a cavity in one surface thereof; first and second penetration holes disposed in a bottom surface of the cavity and penetrating through the core portion; an electronic component disposed in the cavity; and an insulating material filling the cavity and each of the first and second penetration holes, wherein a sidewall of the cavity is higher than the electronic component.

Abstract: Embodiments of gas distribution modules for use with rapid thermal processing (RTP) systems and methods of use thereof are provided herein. In some embodiments, a gas distribution module for use with a RTP chamber includes: a first carrier gas line and a first liquid line fluidly coupled to a mixer, the mixer having one or more control valves configured to mix a carrier gas from the first carrier gas line and a liquid from the first liquid line in a desired ratio to form a first mixture; a vaporizer coupled to the mixer and configured to receive the first mixture in a hollow internal volume, the vaporizer having a heater configured to vaporize the first mixture; and a first gas delivery line disposed between the vaporizer and the RTP chamber to deliver the vaporized first mixture to the RTP chamber.

Abstract: An electronic vapor provision system includes: a control unit configured to provide power from a battery in the control unit, and including a controller configured to control components of the system; and an aerosolizable substrate material carrying portion separably connectable to the control unit to obtain power from the battery, and including first and second electrical circuits including respectively a characteristic-carrying element and a vapor generating element. The second electrical circuit can be selectively provided with power from the battery when power is supplied to the aerosolizable substrate material carrying portion. The controller is configured to operate in a first mode in which a characteristic of the characteristic-carrying element is determined by providing power from the battery to the first electrical circuit, and in a second mode in which the vapor generating element is operated by providing power from the battery to the second electrical circuit.

Abstract: Embodiments of the disclosure are directed to methods of removing metal oxide from a substrate surface by exposing the substrate surface to an un-biased cleaning plasma comprising a mixture of hydrogen (H2) and oxygen (O2). In some embodiments, the substrate surface has at least one feature thereon, the at least one feature defining a trench having a top surface, a bottom surface, and two opposed sidewalls. The un-biased cleaning plasma comprises in a range of from 1% to 20% oxygen (O2) on a molecular basis and greater than or equal to 80% hydrogen (H2). The un-biased cleaning plasma removes substantially all of the metal oxide—such as molybdenum oxide (MoOx), ruthenium oxide (RuOx), or tungsten oxide (WOx)—from the substrate surface, and the top surface, the bottom surface, and the two opposed sidewalls of the trench without damaging the dielectric and/or critical dimension (CD)/profile of the structure.

Abstract: A method and a system for inspecting an extreme ultra violet mask and a mask pod for such masks is provided. An EUV mask inspection tool inspects a mask retrieved from a mask pod placed on the load port positioned exterior of the mask inspection tool. The inspection process is performed during a selected period of time. After the inspection process is initiated, a robotic handling mechanism such as a robotic arm or an AMHS picks up the mask pod and inspects the mask pod for foreign particles. A mask pod inspection tool determines whether the mask pod needs cleaning or replacing based on a selected swap criteria. The mask pod is retrieved from the mask pod inspection tool and placed on the load port before the selected period of time lapses. This method and system promotes a reduction in the overall time required for inspecting the mask and the mask pod.

Abstract: A computing system including a plurality of processing devices configured to execute a Mixture-of-Experts (MoE) layer included in an MoE model. The processing devices are configured to, in each of a plurality of iterations, at each of the processing devices, receive a respective plurality of input tokens. Executing the MoE layer further includes, at each of the processing devices, selecting one or more destination expert sub-models associated with the input tokens. Respective numbers k of expert sub-models selected differ across the iterations. At each of the processing devices, executing the MoE layer further includes conveying the input tokens to the one or more destination expert sub-models. Executing the MoE layer further includes generating one or more respective expert sub-model outputs at the one or more destination expert sub-models. Executing the MoE layer further includes generating and outputting an MoE layer output based on the one or more expert sub-model outputs.

Abstract: A method of forming a ferroelectric random access memory (FeRAM) device includes: forming a first layer stack and a second layer stack successively over a substrate, where the first layer stack and the second layer stack have a same layered structure that includes a layer of a first electrically conductive material over a layer of a first dielectric material, where the first layer stack extends beyond lateral extents of the second layer stack; forming a trench that extends through the first layer stack and the second layer stack; lining sidewalls and a bottom of the trench with a ferroelectric material; conformally forming a channel material in the trench over the ferroelectric material; filling the trench with a second dielectric material; forming a first opening and a second opening in the second dielectric material; and filling the first opening and the second opening with a second electrically conductive material.

Abstract: In some implementations, one or more semiconductor processing tools may form a via for a semiconductor device. The one or more semiconductor processing tools may deposit a metal plug within the via. The one or more semiconductor processing tools may deposit an oxide-based layer on the metal plug within the via. The one or more semiconductor processing tools may deposit a resistor on the oxide-based layer within the via. The one or more semiconductor processing tools may deposit a first landing pad and a second landing pad on the resistor within the via. The one or more semiconductor processing tools may deposit a first metal plug on the first landing pad and a second metal plug on the second landing pad.

Abstract: The present invention relates to a multi-modality system for recommending multiple items using an interaction and a method of operating the same. The multi-modality system includes an interaction data preprocessing module that preprocesses an interaction data set and converts the preprocessed interaction data set into interaction training data; an item data preprocessing module that preprocesses item information data and converts the preprocessed item information data into item training data; and a learning module that includes a neural network model that is trained using the interaction training data and the item training data and outputs a result including a set of recommended items using a conversation context with a user as input.

Abstract: Embodiments disclosed herein may include a method for developing a photopatterned metal oxo photoresist. In an embodiment, the method may include pre-treating the photopatterned metal oxo photoresist with a pre-treatment process, developing the photopatterned metal oxo photoresist with a thermal dry develop process to selectively remove a portion of the photopatterned metal oxo photoresist and form a resist mask. In an embodiment, the thermal dry develop process includes a first sub-operation, and a second sub-operation that is different than the first sub-operation. In an embodiment, the process further includes post-treating the resist mask with a post-treatment process.

Abstract: In an embodiment, a device includes: a word line extending in a first direction; a data storage layer on a sidewall of the word line; a channel layer on a sidewall of the data storage layer; a back gate isolator on a sidewall of the channel layer; and a bit line having a first main region and a first extension region, the first main region contacting the channel layer, the first extension region separated from the channel layer by the back gate isolator, the bit line extending in a second direction, the second direction perpendicular to the first direction.

Abstract: A computing system including a plurality of processing devices configured to execute a Mixture-of-Experts (MoE) layer included in an MoE model. The processing devices are configured to execute the MoE layer at least in part by, during a first collective communication phase between the processing devices, splitting each of a plurality of first input tensors along a first dimension to obtain first output tensors. Executing the MoE layer further includes processing the first output tensors at a respective a plurality of expert sub-models to obtain a plurality of second input tensors. Executing the MoE layer further includes, during a second collective communication phase between the processing devices, receiving the second input tensors from the expert sub-models and concatenating the second input tensors along the first dimension to obtain second output tensors. Executing the MoE layer further includes outputting the second output tensors as output of the MoE layer.

Abstract: A computing system is provided, including a plurality of processing devices configured to execute a Mixture-of-Experts (MoE) layer included in an MoE model. The MoE layer includes a plurality of expert sub-models that each have a respective plurality of parameter values. The MoE layer is configured to be switchable between a data parallel mode and an expert-data-model parallel mode without conveying the respective parameter values of the expert sub-models among the plurality of processing devices.

Abstract: An array substrate includes: a first substrate (10), including a plurality of sub-pixel regions (101) arranged in an array along a row direction (X) and a column direction (Y); a pixel circuit layer, including a plurality of sub-pixel circuits; a planarization layer (17), provided with a first via hole (170) located in the sub-pixel regions (101), and includes at least one pattern portion (171), the pattern portion (171) includes a plurality of pattern units (171a) arranged in an array along the row direction (X) and the column direction (Y); and a reflective electrode layer, wherein the reflective electrode layer includes a plurality of reflective electrodes (18) that are mutually disconnected, each of the reflective electrodes (18) is located in one of the sub-pixel regions (101) and is electrically connected to the sub-pixel circuit through the first via hole (170).