Patents by Inventor Han YEH

Han YEH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11991080
    Abstract: A method for packet filtering in a network switch includes: utilizing an access control list circuit to filter received packets, wherein the access control list circuit compares header information of the received packets with an access control list to filter the received packets, where the access control list has at least one entry, and rule information in the entry includes only a portion of an IP address; and utilizing a routing circuit to further filter packets that pass the access control list circuit, wherein the routing circuit compares header information of the packets that pass the access control list circuit with a routing table to filter the packets, wherein the routing table has at least one entry, and rule information in the entry includes an entire IP address.
    Type: Grant
    Filed: February 17, 2022
    Date of Patent: May 21, 2024
    Assignee: Realtek Semiconductor Corp.
    Inventors: Kai-Wen Cheng, Sz-Han Wang, Wen-Huang Yeh, Wei-Hong You
  • Patent number: 11985481
    Abstract: A hearing compensation device is provided and includes a transducer, which receives sound to convert the sound into electrical signals; and a noise reduction module and a hearing compensation module, which are connected to the transducer to receive the electrical signals synchronously. The noise reduction module generates opposite signals with the same energy as the electrical signals to remove ambient noise. The hearing compensation module obtains a real-time customized audiogram or a hearing table according to a user's current real environment. Multiple sets of parameters of multiple filters are searched via active noise cancellation technology with optimization method and loss function to generate an optimal filter parameter value, such that the noise reduction module and the hearing compensation module disposed in the same chip perform real-time and/or synchronous processing to provide a hearing aid with reduced signal delay, real-time and user customization.
    Type: Grant
    Filed: May 26, 2022
    Date of Patent: May 14, 2024
    Assignee: REHEAR AUDIOLOGY COMPANY LTD.
    Inventors: Ying-Hui Lai, Ming-Han Yeh
  • Publication number: 20240154215
    Abstract: An aluminum plastic film for a lithium battery and a method for manufacturing the same are provided. The method includes steps as follows: preparing a polyolefin adhesive; coating the polyolefin adhesive onto one surface of an aluminum foil layer; disposing an inner polyolefin layer onto the polyolefin adhesive; and drying the polyolefin adhesive, so that a polyolefin adhesive layer is formed between the aluminum foil layer and the inner polyolefin layer. Components of the polyolefin adhesive include a modified polyolefin polymer and a hardener. The modified polyolefin polymer has a modified group, a structure of the modified group contains maleic anhydride, and a molecular weight of the modified polyolefin polymer ranges from 100,000 g/mol to 200,000 g/mol.
    Type: Application
    Filed: February 17, 2023
    Publication date: May 9, 2024
    Inventors: TE-CHAO LIAO, SHIOU-YEH SHENG, TENG-KO MA, CHING-YAO YUAN, Chao-Hsien Lin, CHIA-YU LIN, YUN-BIN HSI, HAN-YI LEE, SHUN-CHIEH YANG
  • Publication number: 20240128143
    Abstract: Provided are a package structure and a method of forming the same. The method includes: forming an interconnect structure on a substrate; performing a laser grooving process to form a first opening in the interconnect structure and form a debris layer on a sidewall of the first opening in a same step; forming a protective layer to fill in the first opening and cover the debris layer and the interconnect structure; patterning the protective layer to form a second opening, wherein the second opening is spaced from the debris layer by the protective layer; performing a planarization process on the protective layer to expose a topmost contact pad of the interconnect structure; and performing a mechanical dicing process through the second opening to form a third opening in the substrate and cut the substrate into a plurality of semiconductor dies.
    Type: Application
    Filed: February 1, 2023
    Publication date: April 18, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Han Hsieh, Yu-Jin Hu, Hua-Wei Tseng, An-Jhih Su, Der-Chyang Yeh
  • Patent number: 11948837
    Abstract: A method for making a semiconductor structure includes: providing a substrate with a contact feature thereon; forming a dielectric layer on the substrate; etching the dielectric layer to form an interconnect opening exposing the contact feature; forming a metal layer on the dielectric layer and outside of the contact feature; and forming a graphene conductive structure on the metal layer, the graphene conductive structure filling the interconnect opening, being electrically connected to the contact feature, and having at least one graphene layer that extends in a direction substantially perpendicular to the substrate.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: April 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ching-Fu Yeh, Chin-Lung Chung, Shu-Wei Li, Yu-Chen Chan, Shin-Yi Yang, Ming-Han Lee
  • Publication number: 20240103209
    Abstract: The present disclosure relates to an optical filter and a method of producing the same. In the producing method, a thermal evaporation deposition process of a sacrificial layer, and depositions process of a base layer and a dielectric stack layer are sequentially performed on a substrate having a trench with a specific width, so that the base layer and the dielectric stack layer extend outward to form a solidified structure with a specific length. Next, a fixed layer is affixed to the dielectric stack layer, and the sacrificial layer is removed using a solvent to remove the substrate. As such, structural strength and flatness of the produced optical filter are enhanced, and a volume thereof is reduced, such that the optical filter can be applied to automated processes of miniaturized elements.
    Type: Application
    Filed: September 26, 2023
    Publication date: March 28, 2024
    Inventors: Chi-Ming YU, Zong Han LI, Chin-Pin YEH
  • Publication number: 20240092861
    Abstract: CD93 functional domains for use in treating osteoporosis. A method of alleviating, reducing, suppressing, and/or treating an osteoclast-related bone disease is disclosed. The method comprises administering a therapeutically effective amount of an isolated recombinant protein comprising an amino acid sequence that is at least 80% identical to human Cluster of Differentiation 93 protein domain 1 to a subject in need thereof, the recombinant protein lacking amino acid residues 1 to 21, transmembrane and cytoplasmic domains of the human CD93 (SEQ ID NO: 3) and having a total length of no more than 559 amino acid residues. In one embodiment, the osteoclast-related bone disease is at least one selected from the group consisting of osteoporosis, postmenopausal osteoporosis, osteopenia, bone loss, inflammatory bone loss, and any combination thereof. In another embodiment, the recombinant protein comprises the amino acid sequence of SEQ ID NO: 1 or SEQ ID NO: 2.
    Type: Application
    Filed: August 9, 2023
    Publication date: March 21, 2024
    Inventors: Chao-Han LAI, Jwu-Lai YEH, Hua-Lin WU, Shang-En HUANG
  • Publication number: 20240088027
    Abstract: An integrated circuit includes an inductor that includes a first set of conductors in at least a first metal layer, and a guard ring enclosing the inductor. The guard ring includes a first conductor extending in a first direction, a second conductor extending in a second direction, and a first set of staggered conductors coupled to a first end of the first conductor and a first end of the second conductor. The first set of staggered conductors includes a second set of conductors in a second metal layer, a third set of conductors in a third metal layer and a first set of vias coupling the second set of conductors with the third set of conductors. The third metal layer is above the second metal layer. All metal lines in the second metal layer that are part of the guard ring extend in the first direction.
    Type: Application
    Filed: November 14, 2023
    Publication date: March 14, 2024
    Inventors: Chiao-Han LEE, Chi-Hsien LIN, Ho-Hsiang CHEN, Hsien-Yuan LIAO, Tzu-Jin YEH, Ying-Ta LU
  • Publication number: 20240017525
    Abstract: A resin composition and a metal clad substrate are provided. The resin composition includes: 20 phr to 40 phr of an epoxy resin, 40 phr to 60 phr of a modified benzoxazine resin, 2 phr to 10 phr of a maleimide resin, and 25 phr to 50 phr of fillers. The modified benzoxazine resin contains a DOPO group. Based on a total weight of the modified benzoxazine resin being 100 wt %, an amount of the DOPO group ranges from 10 wt % to 20 wt %.
    Type: Application
    Filed: December 25, 2022
    Publication date: January 18, 2024
    Inventors: SHENG-YEN WU, KAI-YANG CHEN, MENG-HAN YEH, LI-CHUNG LU
  • Publication number: 20240021186
    Abstract: An earphone device is provided and includes: a wireless or wired transceiver module configured to receive a first electrical signal from an electronic device via a wireless or wired transmission network; a first compensation module connected to the wireless or wired transceiver module and arranged in a streaming audio gain compensating filter of an active noise cancellation chip, where the first compensation module is used to implement a frequency response curve to calculate a frequency response of the first electrical signal in each frequency band, and to generate a first filter parameter of a target frequency response curve via a first compensation gain conversion model, so that the first filter parameter gain compensates the first electrical signal in each of the frequencies; and a first transducer connected to the first compensation module to convert the first electrical signal gain compensating into sound and then transmit the sound.
    Type: Application
    Filed: October 18, 2022
    Publication date: January 18, 2024
    Applicant: GMI Technology Inc.
    Inventors: Ming-Han YEH, Ying-Hui LAI
  • Publication number: 20230403522
    Abstract: A self-fitting hearing compensation device with real-ear measurement is provided and includes: a first transducer, which receives a first test signal from a device and converts the first test signal into a first electrical signal; a first hearing compensation module, which is connected to the first transducer and performs gain compensation on the first electrical signal; a second transducer, which is connected to the first hearing compensation module, converts the gain-compensated first electrical signal into sound, and transmits the sound into an ear canal; and a third transducer, which synchronously converts the sound transmitted in the ear canal into a second electrical signal, so as to transmit the second electrical signal to the device via a wireless transmission network. In addition, a self-fitting hearing compensation method and a computer program product are also provided.
    Type: Application
    Filed: September 26, 2022
    Publication date: December 14, 2023
    Applicant: GMI Technology Inc.
    Inventors: Ming-Han YEH, Ying-Hui LAI
  • Publication number: 20230319489
    Abstract: A hearing compensation device is provided and includes a transducer, which receives sound to convert the sound into electrical signals; and a noise reduction module and a hearing compensation module, which are connected to the transducer to receive the electrical signals synchronously. The noise reduction module generates opposite signals with the same energy as the electrical signals to remove ambient noise. The hearing compensation module obtains a real-time customized audiogram or a hearing table according to a user's current real environment. Multiple sets of parameters of multiple filters are searched via active noise cancellation technology with optimization method and loss function to generate an optimal filter parameter value, such that the noise reduction module and the hearing compensation module disposed in the same chip perform real-time and/or synchronous processing to provide a hearing aid with reduced signal delay, real-time and user customization.
    Type: Application
    Filed: May 26, 2022
    Publication date: October 5, 2023
    Applicant: GMI Technology Inc.
    Inventors: Ying-Hui LAI, Ming-Han YEH
  • Publication number: 20230280666
    Abstract: An extreme ultraviolet (EUV) photolithography system cleans debris from an EUV reticle. The system includes a cleaning electrode configured to be positioned adjacent the EUV reticle. The system includes a voltage source that helps draw debris from the EUV reticle toward the cleaning electrode by applying a voltage of alternating polarity to the cleaning electrode.
    Type: Application
    Filed: May 9, 2023
    Publication date: September 7, 2023
    Inventors: Yen-Hui LI, Cheng-Han YEH, Tzung-Chi FU
  • Patent number: 11681235
    Abstract: An extreme ultraviolet (EUV) photolithography system cleans debris from an EUV reticle. The system includes a cleaning electrode configured to be positioned adjacent the EUV reticle. The system includes a voltage source that helps draw debris from the EUV reticle toward the cleaning electrode by applying a voltage of alternating polarity to the cleaning electrode.
    Type: Grant
    Filed: September 17, 2021
    Date of Patent: June 20, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yen-Hui Li, Cheng-Han Yeh, Tzung-Chi Fu
  • Publication number: 20230075396
    Abstract: A semiconductor device includes channel region, first and second two-dimensional metallic contacts, a gate structure, and first and second metal contacts. The channel region includes a two-dimensional semiconductor material. The first two-dimensional metallic contact is disposed at a side of the channel region and includes a two-dimensional metallic material. The second two-dimensional metallic contact is disposed at an opposite side of the channel region and includes the two-dimensional metallic material. The gate structure is disposed on the channel region in between the first and second two-dimensional metallic contacts. The first metal contact is disposed at an opposite side of the first two-dimensional metallic contact with respect to the channel region. The second metal contact is disposed at an opposite side of the second two-dimensional metallic contact with respect to the channel region.
    Type: Application
    Filed: November 10, 2022
    Publication date: March 9, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Yang Li, Lain-Jong Li, Han Yeh, Wen-Hao Chang
  • Patent number: 11581250
    Abstract: A package includes a chip formed in a first area of the package and a molding compound formed in a second area of the package adjacent to the first area. A first polymer layer is formed on the chip and the molding compound, a second polymer layer is formed on the first polymer layer, and a plurality of interconnect structures is formed between the first polymer layer and the second polymer layer. A metal-insulator-metal (MIM) capacitor is formed on the second polymer layer and electrically coupled to at least one of the plurality of interconnect structures. A metal bump is formed over and electrically coupled to at least one of the plurality of interconnect structures.
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: February 14, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shuo-Mao Chen, Der-Chyang Yeh, Chiung-Han Yeh
  • Patent number: 11527659
    Abstract: A semiconductor device includes channel region, first and second two-dimensional metallic contacts, a gate structure, and first and second metal contacts. The channel region includes a two-dimensional semiconductor material. The first two-dimensional metallic contact is disposed at a side of the channel region and includes a two-dimensional metallic material. The second two-dimensional metallic contact is disposed at an opposite side of the channel region and includes the two-dimensional metallic material. The gate structure is disposed on the channel region in between the first and second two-dimensional metallic contacts. The first metal contact is disposed at an opposite side of the first two-dimensional metallic contact with respect to the channel region. The second metal contact is disposed at an opposite side of the second two-dimensional metallic contact with respect to the channel region.
    Type: Grant
    Filed: October 14, 2020
    Date of Patent: December 13, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Yang Li, Lain-Jong Li, Han Yeh, Wen-Hao Chang
  • Publication number: 20220283521
    Abstract: An extreme ultraviolet (EUV) photolithography system cleans debris from an EUV reticle. The system includes a cleaning electrode configured to be positioned adjacent the EUV reticle. The system includes a voltage source that helps draw debris from the EUV reticle toward the cleaning electrode by applying a voltage of alternating polarity to the cleaning electrode.
    Type: Application
    Filed: September 17, 2021
    Publication date: September 8, 2022
    Inventors: Yen-Hui LI, Cheng-Han Yeh, Tzung-Chi FU
  • Publication number: 20220115541
    Abstract: A semiconductor device includes channel region, first and second two-dimensional metallic contacts, a gate structure, and first and second metal contacts. The channel region includes a two-dimensional semiconductor material. The first two-dimensional metallic contact is disposed at a side of the channel region and includes a two-dimensional metallic material. The second two-dimensional metallic contact is disposed at an opposite side of the channel region and includes the two-dimensional metallic material. The gate structure is disposed on the channel region in between the first and second two-dimensional metallic contacts. The first metal contact is disposed at an opposite side of the first two-dimensional metallic contact with respect to the channel region. The second metal contact is disposed at an opposite side of the second two-dimensional metallic contact with respect to the channel region.
    Type: Application
    Filed: October 14, 2020
    Publication date: April 14, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Yang Li, Lain-Jong Li, Han Yeh, Wen-Hao Chang
  • Publication number: 20210288163
    Abstract: The present disclosure provides an integrated circuit. The integrated circuit includes a semiconductor substrate; and a passive polysilicon device disposed over the semiconductor substrate. The passive polysilicon device further includes a polysilicon feature; and a plurality of electrodes embedded in the polysilicon feature.
    Type: Application
    Filed: May 24, 2021
    Publication date: September 16, 2021
    Inventors: Harry-Hak-Lay Chuang, Kong-Beng Thei, Sheng-Chen Chung, Chiung-Han Yeh, Lee-Wee Teo, Yu-Ying Hsu, Bao-Ru Young