Abstract: A generic high bandwidth adapter providing a unified architecture for data communications between buses, channels, processors, switch fabrics and/or communication networks. Data is carried by data stream packets of variable lengths, and each packet includes a header control information portion required by communication protocols used to mediate the information exchange, and normally a data portion for the data which is to be communicated. A packet memory stores data packets arriving at a plurality of generic adapter input/output ports. The packet memory is segmented into a plurality of buffers, and each data packet is stored in one or more buffers as required by the length thereof.

Abstract: A high impedance is implemented in the input bias path of an integrated instrumentation amplifier. The implementation includes a normally on transistor switch. A signal from the output of the amplifier is used to turn the switch off to provide the requisite high impedance. Otherwise, the switch is on to provide low impedance for proper biasing. The circuit is adapted for encoded input signals such as occur in capacitive coupled credit card encoding circuits.