Patents by Inventor Haneef Mohammed
Haneef Mohammed has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10826499Abstract: A method for operating a system level interconnect in an integrated circuit (IC) is provided in an example embodiment. The method comprises: writing, by a microcontroller in the IC, a first configuration value into a configuration register, where the first configuration value programs the system level interconnect to couple a first peripheral to a second peripheral; monitoring the IC to determine an operational state of the IC; and in response to determining a change in the operational state of the IC, writing by the microcontroller a second configuration value into the configuration register to dynamically change interconnections in the system level interconnect between the first peripheral and the second peripheral.Type: GrantFiled: November 19, 2019Date of Patent: November 3, 2020Assignee: Cypress Semiconductor CorporationInventors: Bert Sullam, Warren Snyder, Haneef Mohammed
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Publication number: 20200169259Abstract: A method for operating a system level interconnect in an integrated circuit (IC) is provided in an example embodiment. The method comprises: writing, by a microcontroller in the IC, a first configuration value into a configuration register, where the first configuration value programs the system level interconnect to couple a first peripheral to a second peripheral; monitoring the IC to determine an operational state of the IC; and in response to determining a change in the operational state of the IC, writing by the microcontroller a second configuration value into the configuration register to dynamically change interconnections in the system level interconnect between the first peripheral and the second peripheral.Type: ApplicationFiled: November 19, 2019Publication date: May 28, 2020Applicant: Cypress Semiconductor CorporationInventors: Bert Sullam, Warren Snyder, Haneef Mohammed
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Patent number: 10516397Abstract: In an example embodiment, a digital block comprises a datapath circuit, one or more programmable logic devices (PLDs), and one or more control registers. The datapath circuit comprises structural arithmetic elements. The one or more PLDs comprise uncommitted programmable logic. The one or more control circuits comprise a control register configured to store user-defined control bits, where the one or more control circuits are configured to control both the structural arithmetic elements and the uncommitted programmable logic based on the user-defined control bits.Type: GrantFiled: September 28, 2018Date of Patent: December 24, 2019Assignee: Cypress Semiconductor CorporationInventors: Bert Sullam, Warren Snyder, Haneef Mohammed
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Publication number: 20190214995Abstract: In an example embodiment, a digital block comprises a datapath circuit, one or more programmable logic devices (PLDs), and one or more control registers. The datapath circuit comprises structural arithmetic elements. The one or more PLDs comprise uncommitted programmable logic. The one or more control circuits comprise a control register configured to store user-defined control bits, where the one or more control circuits are configured to control both the structural arithmetic elements and the uncommitted programmable logic based on the user-defined control bits.Type: ApplicationFiled: September 28, 2018Publication date: July 11, 2019Applicant: Cypress Semiconductor CorporationInventors: Bert Sullam, Warren Snyder, Haneef Mohammed
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Publication number: 20180293332Abstract: A method includes providing a design interface to design a device schematic for a programmable device and receiving a placement of graphical objects in the device schematic, wherein the graphical objects represent components that are both internal and external to the programmable device being configured. The method further includes assigning the graphical objects into one of an internal domain and an external domain and displaying, by the processing device, the graphical objects from both the internal domain and the external domain in a single view of the design interface.Type: ApplicationFiled: June 11, 2018Publication date: October 11, 2018Applicant: Cypress Semiconductor CorporationInventors: Haneef Mohammed, Jack Griffin, Christopher Keeser, Mark Hastings
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Patent number: 10097185Abstract: In an example embodiment, a digital block comprises a datapath circuit, one or more programmable logic devices (PLDs), and one or more control registers. The datapath circuit comprises structural arithmetic elements. The one or more PLDs comprise uncommitted programmable logic. The one or more control circuits comprise a control register configured to store user-defined control bits, where the one or more control circuits are configured to control both the structural arithmetic elements and the uncommitted programmable logic based on the user-defined control bits.Type: GrantFiled: December 20, 2017Date of Patent: October 9, 2018Assignee: Cypress Semiconductor CorporationInventors: Bert Sullam, Warren Snyder, Haneef Mohammed
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Publication number: 20180191351Abstract: In an example embodiment, a digital block comprises a datapath circuit, one or more programmable logic devices (PLDs), and one or more control registers. The datapath circuit comprises structural arithmetic elements. The one or more PLDs comprise uncommitted programmable logic. The one or more control circuits comprise a control register configured to store user-defined control bits, where the one or more control circuits are configured to control both the structural arithmetic elements and the uncommitted programmable logic based on the user-defined control bits.Type: ApplicationFiled: December 20, 2017Publication date: July 5, 2018Applicant: Cypress Semiconductor CorporationInventors: Bert Sullam, Warren Snyder, Haneef Mohammed
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Patent number: 9575748Abstract: A method includes receiving hardware description code that generically describes circuitry, and translating the hardware description code into one or more configuration files specific to a programmable system. The method further includes generating program code for a microcontroller of the programmable system based, at least in part, on the hardware description code, and configuring the programmable system to implement the circuitry according to the configuration files and the program code.Type: GrantFiled: May 7, 2014Date of Patent: February 21, 2017Assignee: Cypress Semiconductor CorporationInventors: Haneef Mohammed, Jack Griffin
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Patent number: 9325320Abstract: A plurality of functional elements are all located on a same integrated circuit wherein at least one of the functional elements comprises a micro-controller. A configuration data store in the integrated circuit stores configuration values loaded by the micro-controller. A plurality of connectors are configured to connect the integrated circuit to external signals. A programmable interconnect also located in the integrated circuit programmably connects together the plurality of functional elements and the plurality of connectors according to the configuration values loaded into the configuration data store.Type: GrantFiled: June 10, 2013Date of Patent: April 26, 2016Assignee: Cypress Semiconductor CorporationInventors: Bert Sullam, Warren Snyder, Haneef Mohammed
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Patent number: 9122344Abstract: Methods and apparatus include receiving a current set of measurements of a touch sense array using a first functional block of a processing device and processing the current set of measurements using a second functional block to render a touch map corresponding to the touch sense array. The methods and apparatus include performing the next set of measurements using the first functional block. Performing the next set of measurements and processing the current set of measurement are performed substantially concurrently.Type: GrantFiled: July 12, 2013Date of Patent: September 1, 2015Inventors: Andriy Yarosh, Roman Ogirko, Oleksandr Pirogov, Victor Kremin, Roman Sharamaga, Anton Konovalov, Andriy Maharyta, Haneef Mohammed
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Patent number: 9018979Abstract: A programmable routing scheme provides improved connectivity both between Universal Digital Blocks (UDBs) and between the UDBs and other micro-controller elements, peripherals and external Inputs and Outputs (I/Os) in the same Integrated Circuit (IC). The routing scheme increases the number of functions, flexibility, and the overall routing efficiency for programmable architectures. The UDBs can be grouped in pairs and share associated horizontal routing channels. Bidirectional horizontal and vertical segmentation elements extend routing both horizontally and vertically between different UDB pairs and to the other peripherals and I/O.Type: GrantFiled: June 28, 2013Date of Patent: April 28, 2015Assignee: Cypress Semiconductor CorporationInventors: Warren Snyder, Bert Sullam, Haneef Mohammed
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Patent number: 9009646Abstract: A method for routing a design may comprise receiving a design for implementing in a target device, wherein the design includes an input/output (I/O) signal of a functional block, and wherein the functional block is assigned to a physical component of the target device; based on the design and on a routing resource graph representing the target device, calculating a route including the physical component and a physical pin of the target device; and assigning the physical pin of the target device to the I/O signal based on the calculated route.Type: GrantFiled: December 31, 2012Date of Patent: April 14, 2015Assignee: Cypress Semiconductor CorporationInventors: Haneef Mohammed, Kyle Kearney
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Patent number: 9003346Abstract: Techniques for reducing post-routing delay variance are described herein. In an example embodiment, an initial netlist includes multiple instances that represent digital components of an electronic design. An base signature is assigned to each instance in the initial netlist, where the base signature is based on two or more design or connectivity attributes of the instance. The base signatures are then used to generate an initial instance ordering of the instances in the initial netlist. A subsequent netlist, different from the initial netlist but representing the same electronic design, is received. Base signatures are assigned to the instances on the subsequent netlist and a subsequent instance ordering is generated. The subsequent instance ordering preserves the same order as the initial instance ordering for those instances that are included in both the initial netlist and the subsequent netlist. In this manner, any later netlist-based processing (e.g.Type: GrantFiled: March 13, 2013Date of Patent: April 7, 2015Assignee: Cypress Semiconductor CorporationInventors: Avijit Dutta, Krishnan Anandh, Steven Danz, Neil Tuttle, Ryan Morse, Haneef Mohammed
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Patent number: 8838852Abstract: A method and apparatus to operate programmable routing logic comprise receiving, from a fixed function block, a first request, responsive to the first request, forwarding the first request to a first resource of one or more controllers, the first resource allocated to the fixed function block. The method and apparatus further comprise receiving, from a programmable function block, a second request, and responsive to the second request, forwarding the second request to a second resource of the one or more controllers, the second resource allocated to the programmable function block.Type: GrantFiled: March 8, 2012Date of Patent: September 16, 2014Assignee: Cypress Semiconductor CorporationInventors: Bert Sullam, Haneef Mohammed
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Publication number: 20140245263Abstract: A method includes receiving hardware description code that generically describes circuitry, and translating the hardware description code into one or more configuration files specific to a programmable system. The method further includes generating program code for a microcontroller of the programmable system based, at least in part, on the hardware description code, and configuring the programmable system to implement the circuitry according to the configuration files and the program code.Type: ApplicationFiled: May 7, 2014Publication date: August 28, 2014Applicant: CYPRESS SEMICONDUCTOR CORPORATIONInventors: Haneef Mohammed, Jack Griffin
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Patent number: 8816890Abstract: An integrated circuit device can include a plurality of analog blocks, including a plurality of programmable analog blocks configurable to provide different analog functions in response to configuration data, at least one programmable analog block including a programmable analog routing coupled to a plurality of external connections to the integrated circuit device; and a plurality of programmable digital blocks, at least one programmable digital block configurable into an analog block control circuit that configures the programmable analog routing.Type: GrantFiled: April 9, 2013Date of Patent: August 26, 2014Assignee: Cypress Semiconductor CorporationInventors: Jean-Paul Vanitegem, Haneef Mohammed, Hans Klein, Harold M. Kutz, Ata Khan
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Patent number: 8752033Abstract: A system interface of a processing system receives an indication to initiate configuration of a programmable system. A processing device coupled to the system interface and associated with an integrated development environment, responsive to the indication, translates a hardware description code into one or more configuration files specific to the programmable system, the hardware description code to describe circuitry in the programmable system. The processing device further generates program code for a microcontroller of the programmable system based, at least in part, on the hardware description code, and configures the programmable system to implement the circuitry according to the configuration files and the program code. In addition, the processing device debugs the programmable system as configured by the configuration files and the program code.Type: GrantFiled: January 11, 2013Date of Patent: June 10, 2014Assignee: Cypress Semiconductor CorporationInventors: Haneef Mohammed, Jack Griffin
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Publication number: 20140118296Abstract: A parallel pipelining method of operation of a touch sense controller for processing data into a touch map is disclosed. A current full scan of response signals to at least one excitation of a touch sense array is received using a first thread of a processing device. The current full scan of response signals is processed using a second thread of the processing device to render a touch map corresponding to the touch sense array. A next full scan of response signals is received using the first thread. Receiving the next full scan and processing the current full scan are performed substantially simultaneously.Type: ApplicationFiled: July 12, 2013Publication date: May 1, 2014Inventors: Andriy Yarosh, Roman Ogirko, Oleksandr Pirogov, Victor Kremin, Roman Sharamaga, Anton Konovalov, Andriy Maharyta, Haneef Mohammed
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Publication number: 20140095120Abstract: A method includes providing a design interface to design a device schematic for a programmable device and receiving a placement of graphical objects in the device schematic, wherein the graphical objects represent components that are both internal and external to the programmable device being configured. The method further includes assigning the graphical objects into one of an internal domain and an external domain and displaying, by the processing device, the graphical objects from both the internal domain and the external domain in a single view of the design interface.Type: ApplicationFiled: September 24, 2013Publication date: April 3, 2014Applicant: Cypress Semiconductor CorporationInventors: Haneef Mohammed, Jack Griffin, Christopher Keeser, Mark Hastings
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Patent number: 8681122Abstract: A touch sense controller configured to be coupled to a touch sense array is disclosed. The touch sense controller includes programmable logic that includes programmable logic elements configured to manage measurement of capacitance associated with the touch sense array.Type: GrantFiled: September 28, 2011Date of Patent: March 25, 2014Assignee: Cypress Semiconductor CorporationInventors: Oleksandr Pirogov, Roman Ogirko, Andriy Yarosh, Viktor Kremin, Roman Sharamaga, Anton Konovalov, Andriy Maharyta, Haneef Mohammed