Abstract: A ramp signal generator may include a current cell unit including a plurality of current sources configured to generate current signals, and a resistance unit connected to an output terminal of the current cell unit. The resistance unit may include a load resistor and an offset resistor connected in series with the load resistor and having a resistance based on analog gains.

Abstract: A ramp signal generating device and an image sensor for decreasing the latency of a ramp signal are provided. The ramp signal generating device may include a first circuit configured to detect a capacitance of a parasitic capacitor, a second circuit configured to charge the parasitic capacitor with a first voltage, and a third circuit configured to receive the capacitance as an input to generate a load current causing the ramp signal with a predetermined slope.

Abstract: An image sensor includes a pixel array connected to a plurality of column lines, a first ramp signal generator generating a first ramp signal, a second ramp signal generator generating a second ramp signal, and an analog-to-digital conversion (ADC) circuit operating in a first mode. The ADC circuit includes a first comparator group comparing the first ramp signal with a first pixel signal received from a first column line group, among the plurality of column lines, and a second comparator group comparing the second ramp signal with a second pixel signal received from a second column line group, among the plurality of column lines. The comparing of the first ramp signal occurs at a comparison time point different from a comparison time point during which the comparing of the second ramp signal occurs.

Abstract: Disclosed is a split computing device operating in a serverless edge computing environment. The split computing device includes a transceiver configured to receive resource information of a terminal from the terminal and to measure a data transmission rate between the terminal and the split computing device in a process of receiving the resource information of the terminal; and a splitting point deriver configured to determine a splitting point of a deep neural network (DNN) model for split computing and an activation status of a container instance for each of tail models of a DNN corresponding to the respective splitting points using the resource information of the terminal, the data transmission rate, and resource information of the split computing device.

Abstract: Disclosed is a ramp signal generator. The ramp signal generator includes: a first unit current source including first sub-unit current sources, and configured to output a first unit current during a first time period; and a second unit current source including second sub-unit current sources, and configured to output a second unit current during a second time period. The first sub-unit current sources are configured to operate according to first sub-ramp control signals, respectively. The second sub-unit current sources are configured to operate according to second sub-ramp control signals, respectively. n first sub-ramp control signals among the first sub-ramp control signals are activated, and m sub-ramp control signals among the second sub-ramp control signals are activated, n and m being different natural numbers.

Abstract: In an example embodiment, a ramp generator includes a ramp circuit that receives a first ramp enable signal from a control circuit during a first ramp period, the first ramp period including a first reset period and a first sensing period, and the ramp circuit being configured to output a first ramp signal to a correlated double sampling circuit; an emphasis circuit that increases a voltage level of the first ramp signal during the first reset period, based on a first enable signal received from the control circuit; and a pre-emphasis circuit that further increases the voltage level of the first ramp signal during a first pre-emphasis period in the first reset period, based on a second enable signal received from the control circuit.

Abstract: A digital-to-analog converter includes a first channel configured to output a first ramp voltage through an output node, and a first bias circuit configured to apply a bias voltage to the first channel. The first channel comprises a plurality of current cells connected to the first bias circuit, a plurality of selection circuits and a plurality of switches, and a first resistor connected to the output node. Each of the plurality of selection circuits of the first channel comprises a first selection circuit configured to connect a current of one of the plurality of current cells to the first resistor in accordance with a first digital input signal, and a second selection circuit configured to connect the current of the current cell to one of the plurality of switches corresponding to the current cell in accordance with a second digital input signal complementary to the first digital input signal.

Abstract: In an example embodiment, a ramp generator includes a ramp circuit that receives a first ramp enable signal from a control circuit during a first ramp period, the first ramp period including a first reset period and a first sensing period, and the ramp circuit being configured to output a first ramp signal to a correlated double sampling circuit; an emphasis circuit that increases a voltage level of the first ramp signal during the first reset period, based on a first enable signal received from the control circuit; and a pre-emphasis circuit that further increases the voltage level of the first ramp signal during a first pre-emphasis period in the first reset period, based on a second enable signal received from the control circuit.