Patents by Inventor Hang-Seok Choi

Hang-Seok Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9966867
    Abstract: A synchronous rectifier controller for an adaptive output power converter is provided. The synchronous rectifier controller includes a voltage detection circuit, a threshold generation circuit, and a driver. The voltage detection circuit detects an output voltage of the adaptive output power converter to generate a detection signal. The threshold generation circuit is coupled to the voltage detection circuit. The threshold generation circuit receives the detection signal and generates a synchronous rectifier (SR) turn-off threshold for a synchronous rectifier coupled to a secondary winding of the flyback converter according to the detection signal. The driver receives the SR turn-off threshold and controls the synchronous rectifier according to the SR turn-off threshold.
    Type: Grant
    Filed: March 17, 2016
    Date of Patent: May 8, 2018
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Jhih-Da Hsu, Hang-Seok Choi
  • Patent number: 9929657
    Abstract: An exemplary embodiment of an alternating valley switching controller is provided. The alternating valley switching controller includes a valley detection circuit and an alternating circuit. The valley detection circuit is coupled to an auxiliary winding of a transformer to generate a valley-detection signal. The alternating circuit alternates a plurality of switching periods of a switching signal according to a blanking-window signal and the valley-detection signal. The blanking-window signal switches between a first voltage level and a second voltage level in the plurality of switching periods. The plurality of switching periods includes at least two first periods and at least two second periods which occur alternately in response to the first voltage level and the second voltage of the blanking-window signal.
    Type: Grant
    Filed: February 16, 2016
    Date of Patent: March 27, 2018
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Chien-Tsun Hsu, Hang-Seok Choi, Chih-Hsien Hsieh
  • Patent number: 9887633
    Abstract: This disclosure provides control techniques for a resonant converter. In one embodiment, a resonant converter controller includes predictive gate drive circuitry configured to generate a predictive gate drive signal indicative of a time duration from a rising edge of a first drive signal for controlling a conduction state of a first inverter switch of a resonant converter system to a synchronous rectifier (SR) current zero crossing instant of a first SR switch of the resonant converter system, wherein the first tracking signal is based on at least the first drive signal and a voltage drop across the first SR switch. The resonant converter controller may also include SR gate drive shrink circuitry configured to generate an SR gate drive turn on delay signal to increase delay of SR on times in response to detection of a decrease in load current demand of the resonant converter system.
    Type: Grant
    Filed: February 9, 2015
    Date of Patent: February 6, 2018
    Assignee: Fairchild Semiconductor Corporation
    Inventor: Hang-Seok Choi
  • Publication number: 20180034261
    Abstract: A resonant converter includes a first switch on the primary side and a second switch coupled to the first switch, a synchronization rectification switch on a secondary side configured to conduct during a conduction period in response to a switching operation of the first switch, and a switch control circuit configured to determine an operating region of the resonant converter to be below resonance based on a result of a comparison between the conduction period and an on period of the first switch.
    Type: Application
    Filed: October 11, 2017
    Publication date: February 1, 2018
    Applicant: FAIRCHILD KOREA SEMICONDUCTOR LTD.
    Inventors: Won-Tae LEE, Ji-Hoon JANG, Hyeong Seok BAEK, Hang-Seok CHOI
  • Patent number: 9825453
    Abstract: A protection mode control circuit includes an auto-restart counter configured to count the cycle of a first signal in a protection condition and to generate an auto-restart signal when a result of the count reaches a protection reference value and a latch mode unit configured to generate a latch mode signal for changing protection mode to latch mode when the auto-restart signal is consecutively generated by a predetermined threshold number.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: November 21, 2017
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Won-Tae Lee, Ji-Hoon Jang, Hyeong Seok Baek, Hang-Seok Choi
  • Patent number: 9812855
    Abstract: A resonant converter includes a first switch on the primary side and a second switch coupled to the first switch, a synchronization rectification switch on a secondary side configured to conduct during a conduction period in response to a switching operation of the first switch, and a switch control circuit configured to determine an operating region of the resonant converter to be below resonance based on a result of a comparison between the conduction period and an on period of the first switch.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: November 7, 2017
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Won-Tae Lee, Ji-Hoon Jang, Hyeong Seok Baek, Hang-Seok Choi
  • Publication number: 20170310231
    Abstract: A resonant converter includes a first switch on a primary side and a second switch coupled to the first switch, a first synchronous rectification switch on a secondary side conducted according to a switching operation of the first switch, a second synchronous rectification switch on the secondary side conducted according to a switching operation of the second switch, and a switch control circuit configured to detect a waveform of one end voltage of at least one of the first synchronous rectification switch and the second synchronous rectification switch, determine one of a below region and an above region, and differently control conduction duration of the first and second synchronous rectification switches according to a determined result.
    Type: Application
    Filed: July 10, 2017
    Publication date: October 26, 2017
    Applicant: FAIRCHILD KOREA SEMICONDUCTOR LTD.
    Inventors: Won-Tae LEE, Hyeong Seok BAEK, Ji-Hoon JANG, Hang-Seok CHOI, Moon-Ho CHOI
  • Patent number: 9729072
    Abstract: A resonant converter includes a first switch on a primary side and a second switch coupled to the first switch, a first synchronous rectification switch on a secondary side conducted according to a switching operation of the first switch, a second synchronous rectification switch on the secondary side conducted according to a switching operation of the second switch, and a switch control circuit configured to detect a waveform of one end voltage of at least one of the first synchronous rectification switch and the second synchronous rectification switch, determine one of a below region and an above region, and differently control conduction duration of the first and second synchronous rectification switches according to a determined result.
    Type: Grant
    Filed: February 11, 2015
    Date of Patent: August 8, 2017
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Won-Tae Lee, Hyeong Seok Baek, Ji-Hoon Jang, Hang-Seok Choi, Moon-Ho Choi
  • Publication number: 20170179809
    Abstract: A switch control circuit includes a first pin connected to a first voltage, and a second pin connected to another end of a first resistor including an end connected to the first pin and a first capacitor. In the switch control circuit, at least two of first dead time information, second dead time information, and a protection mode are set by using a multi-voltage of the second pin. The first dead time information is information about a dead time of a first switch and a second switch controlling power supply, the second dead time information is information about a dead time for synchronous rectification, and the protection mode includes an auto-restart mode and a latch mode.
    Type: Application
    Filed: March 1, 2017
    Publication date: June 22, 2017
    Applicant: FAIRCHILD KOREA SEMICONDUCTOR LTD.
    Inventor: Hang-Seok CHOI
  • Patent number: 9647528
    Abstract: A resonant converter includes a first switch coupled between a first node and a primary side ground, a second switch coupled between an input voltage and the first node, at least one capacitor and at least one inductor coupled in series between both ends of the first switch, and a switch control circuit that shifts switching frequencies of the first and second switches during a period for which an abnormal event lasts when occurrence of the abnormal event is detected, and shifts the switching frequencies in an opposite direction when the abnormal event ends.
    Type: Grant
    Filed: February 11, 2015
    Date of Patent: May 9, 2017
    Assignee: Fairchild Korea Semiconductor LTD
    Inventors: Won-Tae Lee, Hyeong Seok Baek, Ji-Hoon Jang, Hang-Seok Choi
  • Patent number: 9627988
    Abstract: A resonant converter includes a primary-side winding electrically coupled to an input voltage, a secondary-side winding electrically coupled to a load, first and second switches coupled to one end of the primary-side winding, and a switch control circuit configured to differently control switching frequency limit ratios of the first and second switches by differently limiting a frequency variation ratio of a first clock signal that determines switching frequencies of the first and second switches according to variation of one of the input voltage and the load.
    Type: Grant
    Filed: February 5, 2015
    Date of Patent: April 18, 2017
    Assignee: Fairchild Korea Semiconductor LTD.
    Inventors: Won-Tae Lee, Hyeong Seok Baek, Ji-Hoon Jang, Hang-Seok Choi
  • Publication number: 20160373019
    Abstract: A synchronous rectifier controller for an adaptive output power converter is provided. The synchronous rectifier controller includes a voltage detection circuit, a threshold generation circuit, and a driver. The voltage detection circuit detects an output voltage of the adaptive output power converter to generate a detection signal. The threshold generation circuit is coupled to the voltage detection circuit. The threshold generation circuit receives the detection signal and generates a synchronous rectifier (SR) turn-off threshold for a synchronous rectifier coupled to a secondary winding of the flyback converter according to the detection signal. The driver receives the SR turn-off threshold and controls the synchronous rectifier according to the SR turn-off threshold.
    Type: Application
    Filed: March 17, 2016
    Publication date: December 22, 2016
    Inventors: Jhih-Da HSU, Hang-Seok CHOI
  • Publication number: 20160241150
    Abstract: An exemplary embodiment of an alternating valley switching controller is provided. The alternating valley switching controller includes a valley detection circuit and an alternating circuit. The valley detection circuit is coupled to an auxiliary winding of a transformer to generate a valley-detection signal. The alternating circuit alternates a plurality of switching periods of a switching signal according to a blanking-window signal and the valley-detection signal. The blanking-window signal switches between a first voltage level and a second voltage level in the plurality of switching periods. The plurality of switching periods includes at least two first periods and at least two second periods which occur alternately in response to the first voltage level and the second voltage of the blanking-window signal.
    Type: Application
    Filed: February 16, 2016
    Publication date: August 18, 2016
    Inventors: Chien-Tsun HSU, Hang-Seok CHOI, Chih-Hsien HSIEH
  • Patent number: 9419686
    Abstract: A receiver of a near field communication device includes a local oscillator, a first channel, and a second channel. The local oscillator may be configured to generate a first local oscillating signal. The first channel may be configured to process an input signal by mixing the input signal with the first local oscillating signal. The second channel may be configured to process the input signal by mixing the input signal with a second local oscillating signal that has a phase difference of 90 degrees with respect to the first local oscillating signal. Each of the first and second channels may include a comparator unit that includes a comparator configured to compare, in a comparator mode, an amplifier output signal with a reference voltage whose level increases in a step-wise manner and the comparator unit may be configured to set a level of the reference voltage to be used in a normal mode based on an output signal of the comparator.
    Type: Grant
    Filed: August 4, 2014
    Date of Patent: August 16, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hang-Seok Choi, Il-Jong Song, Jun-Ho Kim, Hyuk-Jun Sung, Min-Woo Lee
  • Publication number: 20160172989
    Abstract: A resonant converter includes a first switch on the primary side and a second switch coupled to the first switch, a synchronization rectification switch on a secondary side configured to conduct during a conduction period in response to a switching operation of the first switch, and a switch control circuit configured to determine an operating region of the resonant converter to be below resonance based on a result of a comparison between the conduction period and an on period of the first switch.
    Type: Application
    Filed: December 10, 2015
    Publication date: June 16, 2016
    Applicant: FAIRCHILD KOREA SEMICONDUCTOR LTD.
    Inventors: Won-Tae LEE, Ji-Hoon JANG, Hyeong Seok BAEK, Hang-Seok CHOI
  • Publication number: 20160172841
    Abstract: A protection mode control circuit includes an auto-restart counter configured to count the cycle of a first signal in a protection condition and to generate an auto-restart signal when a result of the count reaches a protection reference value and a latch mode unit configured to generate a latch mode signal for changing protection mode to latch mode when the auto-restart signal is consecutively generated by a predetermined threshold number.
    Type: Application
    Filed: December 10, 2015
    Publication date: June 16, 2016
    Applicant: FAIRCHILD KOREA SEMICONDUCTOR LTD.
    Inventors: Won-Tae LEE, Ji-Hoon JANG, Hyeong Seok BAEK, Hang-Seok CHOI
  • Patent number: 9350258
    Abstract: A circuit configured to detect the conduction of a first body diode and a second body diode of the first and second synchronous rectification transistors is provided. The circuit includes a low-pass filter configured to generate a filtered voltage by receiving a detection voltage based on a drain voltage of the first synchronous rectification transistor and low-pass filtering the received drain voltage, a first comparator configured to compare whether the filtered voltage is higher than the detection voltage, and a second comparator configured to compare whether the detection voltage is higher than the filtered voltage. A time point of ending a first synchronous rectification conduction interval of the first body diode and a time point of a second synchronous rectification conduction interval of the second body diode are determined, according to outputs from the first and second comparators.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: May 24, 2016
    Assignee: Fairchild Korea Semiconductor LTD
    Inventor: Hang-Seok Choi
  • Patent number: 9344153
    Abstract: Reader receivers including a sample clock providing unit are provided. The sample clock providing unit may be configured to generate a plurality of first clock signals of equivalent frequency that are out-of-phase relative to each other and further configured to generate first and second sample clock signals of unequal phase from selected ones of the plurality of first clock signals by comparing a respective phase of each of the plurality of first clock signals against a phase of a reference clock signal.
    Type: Grant
    Filed: November 18, 2014
    Date of Patent: May 17, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-Ho Kim, Il-Jong Song, Hang-Seok Choi
  • Publication number: 20150365006
    Abstract: A circuit configured to detect the conduction of a first body diode and a second body diode of the first and second synchronous rectification transistors is provided. The circuit includes a low-pass filter configured to generate a filtered voltage by receiving a detection voltage based on a drain voltage of the first synchronous rectification transistor and low-pass filtering the received drain voltage, a first comparator configured to compare whether the filtered voltage is higher than the detection voltage, and a second comparator configured to compare whether the detection voltage is higher than the filtered voltage. A time point of ending a first synchronous rectification conduction interval of the first body diode and a time point of a second synchronous rectification conduction interval of the second body diode are determined, according to outputs from the first and second comparators.
    Type: Application
    Filed: June 13, 2014
    Publication date: December 17, 2015
    Inventor: Hang-Seok CHOI
  • Publication number: 20150326103
    Abstract: A switch control circuit includes a first pin connected to a first voltage, and a second pin connected to another end of a first resistor including an end connected to the first pin and a first capacitor. In the switch control circuit, at least two of first dead time information, second dead time information, and a protection mode are set by using a multi-voltage of the second pin. The first dead time information is information about a dead time of a first switch and a second switch controlling power supply, the second dead time information is information about a dead time for synchronous rectification, and the protection mode includes an auto-restart mode and a latch mode.
    Type: Application
    Filed: May 8, 2014
    Publication date: November 12, 2015
    Applicant: FAIRCHILD KOREA SEMICONDUCTOR LTD.
    Inventor: Hang-Seok CHOI