Patents by Inventor Hang Yang

Hang Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11987866
    Abstract: An alloy consisting of titanium, zirconium, cobalt, and nickel, and its fabrication.
    Type: Grant
    Filed: July 22, 2022
    Date of Patent: May 21, 2024
    Assignee: City University of Hong Kong
    Inventors: Yong Yang, Hang Wang
  • Publication number: 20240149315
    Abstract: The present invention discloses a microwave heating system for desorbing contaminated soil, comprising: a feeding module; a heating cavity; a first microwave suppression cavity; a second microwave suppression cavity; a conveyor belt; a feeding device; and an exhaust module. The feeding device is arranged above the first microwave suppression cavity or the second microwave suppression cavity, and the feeding device contains a microwave absorber material. The invention further discloses a microwave heating process for desorption of polluted soil. With the microwave heating system and process for desorbing contaminated soil, the contaminated soil can be heated quickly and uniformly, and quickly cooled and taken out smoothly.
    Type: Application
    Filed: September 7, 2023
    Publication date: May 9, 2024
    Inventors: Tsung-Chih YU, Tung-Chieh YANG, Wu-Yeh LEE, Min-Hang WENG
  • Patent number: 11976914
    Abstract: An efficient blasting method for similar cutting in a rock tunnel is provided, which relates to the technical field of rock tunneling. The method includes the following steps: drilling: drilling central holes, lower cutting holes, upper cutting holes, auxiliary holes and peripheral holes in a cross section area for tunnel construction; filling explosives: filling explosives into the central holes, the lower cutting holes, the upper cutting holes, the auxiliary holes and the peripheral holes; and blasting: blasting following blast holes in turn to complete full-face one-time blasting in a millisecond delay blasting mode. The method is applicable for construction scenes of drilling and blasting methods.
    Type: Grant
    Filed: September 20, 2023
    Date of Patent: May 7, 2024
    Assignees: University of Science and Technology Beijing, China University of Mining and Technology, Beijing
    Inventors: Renshu Yang, Yanbing Wang, Chengxiao Li, Zhaoran Zhang, Xinmin Ma, Hang Zhang, Zhouqi Bao
  • Patent number: 11977818
    Abstract: A method of producing a disconnect clutch includes producing a disconnect clutch, configured to selectively connect an engine and an electric machine, such that the disconnect clutch exhibits a clutch transfer function that causes a transmission output shaft torque variability that is less than a predetermined threshold during a simulated starting of the engine using the electric machine.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: May 7, 2024
    Assignee: Ford Global Technologies, LLC
    Inventors: Hang Yang, Huanyi Shui, Yijing Zhang, Hiral Jayantilal Haria, Bradley Dean Riedle, Yuji Fujii
  • Publication number: 20240140023
    Abstract: The present disclosure provides a method for photo-curing 4D printing of a multi-layer structure with an adjustable shape recovery speed, and a multi-layer structure printed thereby. The multi-layer structure printed by the method for photo-curing 4D printing of the multi-layer structure with the adjustable shape recovery speed includes a plurality of deformation units sequentially connected in series, and each of the plurality of the deformation units includes two slow layers, a fast layer, and a transition layer; and the fast layer is arranged between the two slow layers, and the transition layer is arranged between at least one of the two slow layers and the fast layer. In the present disclosure, a low cross-linking layer is doped with a nanocarbon light-absorbing material to solve the problem that the low cross-linking layer is prone to over-curing when a high cross-linking layer is printed on the low cross-linking layer.
    Type: Application
    Filed: December 16, 2022
    Publication date: May 2, 2024
    Applicant: Jiangsu University
    Inventors: Shu HUANG, Hang ZHANG, Jianzhong ZHOU, Jie SHENG, Jiean WEI, Hongwei YANG, Cheng WANG, Mingyuan SHAN
  • Publication number: 20240139295
    Abstract: An antibacterial peptide P104 and a lysin LysP53 with broad-spectrum lytic activity and applications thereof are provided. The amino acid sequence of the antibacterial peptide P104 is shown as SEQ ID NO: 1, and the gene sequence of the antibacterial peptide P104 is shown as SEQ ID NO: 3. The amino acid sequence of the lysin LysP53 is shown as SEQ ID NO: 2, and the gene sequence of the lysin LysP53 is shown as SEQ ID NO: 4. The antibacterial peptide P104 and the lysin LysP53 have lytic activity against Gram-negative bacteria, such as Acinetobacter baumannii, Pseudomonas aeruginosa, Klebsiella pneumoniae and Escherichia coli The lysin LysP53 can be subjected to soluble expression by Escherichia coli, and the activity of the lysin is high. Therefore, they have good application prospects in the research and development of anti-infective drugs.
    Type: Application
    Filed: December 28, 2023
    Publication date: May 2, 2024
    Inventors: Hongping WEI, Hang Yang, Changchang Li, Junping Yu, Mengwei Jiang
  • Publication number: 20240145389
    Abstract: A semiconductor chip includes a first intellectual property block. There are a second intellectual property block and a third intellectual property block around the first intellectual property block. There is a multiple metal layer stack over the first intellectual property block, the second intellectual property block, and the third intellectual property block. An interconnect structure is situated in the upper portion of the multiple metal layer stack. The interconnect structure is configured for connecting the first intellectual property block and the second intellectual property block. In addition, at least a part of the interconnect structure extends across and over the third intellectual property block.
    Type: Application
    Filed: July 28, 2023
    Publication date: May 2, 2024
    Inventors: Li-Chiu WENG, Yew Teck TIEO, Ming-Hsuan WANG, Chia-Cheng CHEN, Wei-Yi CHANG, Jen-Hang YANG, Chien-Hsiung HSU
  • Patent number: 11972301
    Abstract: The present disclosure relates to systems, methods, and computer readable media for predicting surplus capacity on a set of server nodes and determining a quantity of deferrable virtual machines (VMs) that may be scheduled over an upcoming period of time. This determination of VM quantity may be determined while minimizing risks associated with allocation failures on the set of server nodes. This disclosure described systems that facilitate features and functionality related to improving utilization of surplus resource capacity on a plurality of server nodes by implementing VMs having some flexibility in timing of deployment while also avoiding significant risk caused as a result of over-allocated storage and computing resources. In one or more embodiments, the quantity of deferrable VMs is determined and scheduled in accordance with rules of a scheduling policy.
    Type: Grant
    Filed: April 13, 2021
    Date of Patent: April 30, 2024
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Yuwen Yang, Gurpreet Virdi, Bo Qiao, Hang Dong, Karthikeyan Subramanian, Marko Lalic, Shandan Zhou, Si Qin, Thomas Moscibroda, Yunus Mohammed
  • Publication number: 20240127455
    Abstract: Methods and apparatuses of boundary refinement for instance segmentation. The methods for instance segmentation include receiving an image and an instance mask identifying an instance in the image; extracting a set of image patches from the image based on a boundary of the instance mask; generating a refined mask patch for each of the set of image patches based on at least a part of the instance mask corresponding to the each of the set of image patches; and refining the boundary of the instance mask based on the refined mask patch for each of the set of image patches.
    Type: Application
    Filed: March 3, 2021
    Publication date: April 18, 2024
    Inventors: Chufeng Tang, Hang Chen, Jianmin Li, Xiao Li, Xiaolin Hu, Hao Yang
  • Patent number: 11955378
    Abstract: A bonding method of package components and a bonding apparatus are provided. The method includes: providing at least one first package component and a second package component, wherein the at least one first package component has first electrical connectors and a first dielectric layer at a bonding surface of the at least one first package component, and the second package component has second electrical connectors and a second dielectric layer at a bonding surface of the second package component; bringing the at least one first package component and the second package component in contact, such that the first electrical connectors approximate or contact the second electrical connectors; and selectively heating the first electrical connectors and the second electrical connectors by electromagnetic induction, in order to bond the first electrical connectors with the second electrical connectors.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Li Hsiao, Chih-Hang Tung, Chen-Hua Yu, Tung-Liang Shao, Su-Chun Yang
  • Publication number: 20240105237
    Abstract: In certain aspects, a circuit for multi-mode calibration can include a resistor input. The circuit can also include a first comparator connected to the resistor input and to a first plurality of voltage sources. The circuit can also include a first pull-up driver. The circuit can further include a logic pull-up code generator to calibrate the first pull-up driver. The circuit can additionally include a replica of the first pull-up driver. The circuit can also include a first pull-down driver and a second comparator connected to the replica, the first pull-down driver, and a second plurality of voltage sources. The second comparator can compare a voltage of a middle point between the first pull-down driver and the second pull-up driver to one of the second plurality of voltage sources. The circuit can further include a logic pull-down code generator.
    Type: Application
    Filed: December 4, 2023
    Publication date: March 28, 2024
    Inventors: Hang Song, Daesik Song, Lin Yang
  • Publication number: 20240105238
    Abstract: In certain aspects, a circuit for multi-mode calibration can include a resistor input. The circuit can also include a first comparator connected to the resistor input and to a first plurality of voltage sources. The circuit can also include a first pull-up driver. The circuit can further include a logic pull-up code generator to calibrate the first pull-up driver. The circuit can additionally include a replica of the first pull-up driver. The circuit can also include a first pull-down driver and a second comparator connected to the replica, the first pull-down driver, and a second plurality of voltage sources. The second comparator can compare a voltage of a middle point between the first pull-down driver and the second pull-up driver to one of the second plurality of voltage sources. The circuit can further include a logic pull-down code generator.
    Type: Application
    Filed: December 4, 2023
    Publication date: March 28, 2024
    Inventors: Hang Song, Daesik Song, Lin Yang
  • Publication number: 20240101602
    Abstract: Provided is a peptide and method in preventing or treating infections caused by a wide spectrum of pathogens, including bacteria and fungus in hosts such as plants and animals. Methods of preventing or treating plant diseases and infection in animals are also provided.
    Type: Application
    Filed: November 24, 2021
    Publication date: March 28, 2024
    Inventors: Rita P.Y. Chen, Chiu-Ping CHENG, Chien-Chih YANG, Kung-Ta LEE, Ying-Lien CHEN, Li-Hang Hsu, Hsin-Liang CHEN, Sung CHEN
  • Publication number: 20240093149
    Abstract: The present invention relates to population of T cells with reduced expression of SIGLEC15, wherein the T cells are derived from sentinel lymph nodes in a subject having a cancer. The invention also relates to methods for obtaining such T cells, as well as to their use in therapy and pharmaceutical compositions comprising such T cells.
    Type: Application
    Filed: December 1, 2021
    Publication date: March 21, 2024
    Inventors: Yuan Yang, Hang Du, Jingling Tang, Pingsheng Hu
  • Patent number: 11935751
    Abstract: Exemplary deposition methods may include delivering a boron-containing precursor and a nitrogen-containing precursor to a processing region of a semiconductor processing chamber. The methods may include providing a hydrogen-containing precursor with the boron-containing precursor and the nitrogen-containing precursor. A flow rate ratio of the hydrogen-containing precursor to either of the boron-containing precursor or the nitrogen-containing precursor may be greater than or about 2:1. The methods may include forming a plasma of all precursors within the processing region of the semiconductor processing chamber. The methods may include depositing a boron-and-nitrogen material on a substrate disposed within the processing region of the semiconductor processing chamber.
    Type: Grant
    Filed: May 25, 2021
    Date of Patent: March 19, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Siyu Zhu, Chuanxi Yang, Hang Yu, Deenesh Padhi, Yeonju Kwak, Jeong Hwan Kim, Qian Fu, Xiawan Yang
  • Publication number: 20240078436
    Abstract: A method for generating adversarial examples for a Graph Neural Network (GNN) model. The method includes: determining vulnerable features of target nodes in a graph based on querying the GNN model, wherein the graph comprising nodes including the target nodes and edges, each of the edges connecting two of the nodes; grouping the target nodes into a plurality of clusters according to the vulnerable features of the target nodes; and obtaining the adversarial examples based on the plurality of clusters.
    Type: Application
    Filed: January 4, 2021
    Publication date: March 7, 2024
    Inventors: Hang Su, Jun Zhu, Zhengyi Wang, Hao Yang
  • Publication number: 20240080155
    Abstract: An apparatus and method in a wireless communication system and a computer readable storage medium. The apparatus comprises a processing circuit, which is configured to: configure a sounding reference signal (SRS) mapping structure for a user equipment on the basis of at least the number of antenna ports of the user equipment and the number of transmitting beams and/or receiving beams to be scanned; and notify the user equipment of the SRS mapping structure, wherein the SRS mapping structure at least comprises SRS resource settings for achieving uplink beam management and channel state information (CSI) acquisition at the same time, thereby reducing the system time delay and improving the uplink resource utilization rate.
    Type: Application
    Filed: November 15, 2023
    Publication date: March 7, 2024
    Applicant: Sony Group Corporation
    Inventors: Jin XU, Dongru LI, Hang YANG, Xiaofeng TAO, Jianfei CAO
  • Publication number: 20240037179
    Abstract: A data processing method and data processing apparatus are provided. The data processing method includes: acquiring multiple input tensors as input parameters for calculation process; for each input tensor, using M input sub-tensors that are combined to represent the input tensor; for each of the input tensors, replacing the input tensors with the M input sub-tensors that are combined to represent the input tensor, and performing the calculation process to obtain a calculation result. The data processing method increases the applicable scenarios of calculation process, effectively utilizes the powerful calculation ability of the originally provided low-accuracy floating points, and greatly improves the overall calculation efficiency.
    Type: Application
    Filed: November 10, 2022
    Publication date: February 1, 2024
    Applicant: Shanghai Biren Technology Co.,Ltd
    Inventors: Shuangshuang WU, Yunpeng WANG, Jun PENG, Liucheng DUAN, Hang YANG, Xiaoyang LI, Lingjie XU, HaiChuan WANG, Shu CHEN
  • Publication number: 20240010890
    Abstract: Provided are flux-compatible epoxy-phenol adhesive compositions useful as a low gap underfill and novel phenols useful therein. The flux-compatible epoxy-phenol adhesive compositions include an epoxy component including an epoxy compound having a cycloaliphatic, alicyclic or mixed cycloaliphatic-aromatic backbone, a multifunctional phenolic component, and a catalyst. The flux-compatible compositions are useful as an underfilling sealant which (1) rapidly fills the underfill space in a semiconductor device, such as a flip chip assembly, (2) enables the device to be securely connected to a circuit board by short-time heat curing and with good productivity, and (3) demonstrates excellent solder reflow resistance.
    Type: Application
    Filed: September 25, 2023
    Publication date: January 11, 2024
    Inventors: Laxmisha M. Sridhar, Zhan Hang Yang
  • Patent number: D1021387
    Type: Grant
    Filed: December 28, 2022
    Date of Patent: April 9, 2024
    Inventors: Bin Huang, Shuo Liu, Hang Du, Ruoxue Yang, Chongyang Cui