Patents by Inventor Hans-Jurgen Gahle
Hans-Jurgen Gahle has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7501276Abstract: A process is provided for the intracellular manipulation of a biological cell (3) which is positioned adhering to a support area (5) in a culture medium (2). Inside the support area (5) for the cell (3) an opening into the membrane of the cell (3) is created spaced from its support edge. The edge of the cell membrane surrounding the opening, adhering to the support area (5), thus seals off the cell fluid situated in the interior of the cell (3) from the culture medium (2) and insulates the cell fluid against the culture medium (2). The interior of the cell (3) is manipulated through the opening. An apparatus for implementing the process is also provided, including an object carrier (4) with a support area (5) for adhering the cell and a poration tool (6) for creating the opening in the cell membrane. The poration tool (6) may be any of various chemical, mechanical and/or electrical devices.Type: GrantFiled: July 23, 2002Date of Patent: March 10, 2009Assignee: Micronas GmbHInventors: Werner Baumann, Ralf Ehret, Mirko Lehmann, Günter Igel, Hans-Jürgen Gahle, Ulrich Sieben, Ingo Freund, Martin Brischwein
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Patent number: 7470962Abstract: The invention relates to a device for measuring living cells or similar biocomponents comprising a field effect transistor which is provided with a source, a drain and a channel area placed on a substrate. Said channel area connects said source and drain and is provided with a gate-electrode mounted thereon. The gate electrode has at least two laterally disposed parallel electrode areas which are perpendicular to a direction in which the channel area connects the source to the drain in such a way that they are distant and electrically insulated from each other.Type: GrantFiled: March 1, 2005Date of Patent: December 30, 2008Assignee: Micronas GmbHInventors: Werner Baumann, Mirko Lehmann, Ingo Freund, Hans-Jurgen Gahle
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Publication number: 20080220541Abstract: A process for structuring a surface layer of an object includes applying bio-components to the surface of the object that carry away surface material. The bio-components are contained in at least one of a nutrient and osmotic protective medium. The at least one of a nutrient and osmotic protective medium having the bio-components contained therein is removed after the surface material is carried away from the object surface.Type: ApplicationFiled: May 14, 2008Publication date: September 11, 2008Applicant: Micronas GmbHInventors: Bernhard Wolf, Hans-Jurgen Gahle, Gunter Igel, Werner Baumann, Ralf Ehret, Mirko Lehmann
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Publication number: 20060154379Abstract: A process for structuring a surface layer of an object includes applying bio-components to the surface of the object that carry away surface material. The bio-components are contained in at least one of a nutrient and osmotic protective medium. The at least one of a nutrient and osmotic protective medium having the bio-components contained therein is removed after the surface material is carried away from the object surface.Type: ApplicationFiled: March 9, 2006Publication date: July 13, 2006Inventors: Bernhard Wolf, Hans-Jurgen Gahle, Giinter Igel, Werner Baumann, Ralf Ehret, Mirko Lehmann
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Publication number: 20040091997Abstract: A process for structuring a surface layer of an object includes applying bio-components to the surface of the object that carry away surface material. The bio-components are contained in at least one of a nutrient and osmotic protective medium. The at least one of a nutrient and osmotic protective medium having the bio-components contained therein is removed after the surface material is carried away from the object surface.Type: ApplicationFiled: October 24, 2003Publication date: May 13, 2004Applicant: Micronas GmbHInventors: Bernhard Wolf, Hans-Jurgen Gahle, Gunter Igel, Werner Baumann, Ralf Ehret, Mirko Lehmann
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Patent number: 6656678Abstract: In a method for examination of the surface of an object for a topographic and/or a chemical property, the object-surface is impinged with surface-structure selective biocomponents for examination of a topographic property and/or with chemoselective biocomponents for the examination of a chemical property, together with a nutrient medium and/or an osmotic protective medium for the biocomponents. The biocomponents contained in the nutrient medium and/or the osmotic protective medium are in contact with the object-surface or are spaced from the object surface by less than the detection range of the biocomponents. The object surface is then examined with the biocomponents contained in the nutrient medium and/or the osmotic protective medium by determining at least one examination measurement value. The examination measurement value is compared with a reference measurement value, and conclusions can be drawn about the topographic and/or chemical properties of the object from the result of the comparison.Type: GrantFiled: June 1, 2000Date of Patent: December 2, 2003Assignee: Micronas GmbHInventors: Bernhard Wolf, Hans-Jürgen Gahle, Günter Igel, Werner Baumann, Ralf Ehret, Mirko Lehmann
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Publication number: 20030059936Abstract: A process is provided for the intracellular manipulation of a biological cell (3) which is positioned adhering to a support area (5) in a culture medium (2). Inside the support area (5) for the cell (3) an opening into the membrane of the cell (3) is created spaced from its support edge. The edge of the cell membrane surrounding the opening, adhering to the support area (5), thus seals off the cell fluid situated in the interior of the cell (3) from the culture medium (2) and insulates the cell fluid against the culture medium (2). The interior of the cell (3) is manipulated through the opening. An apparatus for implementing the process is also provided, including an object carrier (4) with a support area (5) for adhering the cell and a poration tool (6) for creating the opening in the cell membrane. The poration tool (6) may be any of various chemical, mechanical and/or electrical devices.Type: ApplicationFiled: July 23, 2002Publication date: March 27, 2003Applicant: Micronas GmbHInventors: Werner Baumann, Ralf Ehret, Mirko Lehmann, Gunter Igel, Hans-Jurgen Gahle, Ulrich Sieben, Ingo Freund, Martin Brischwein
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Patent number: 6475760Abstract: A process is provided for the intracellular manipulation of a biological cell (3) which is positioned adhering to a support area (5) in a culture medium (2). Inside the support area (5) for the cell (3) an opening into the membrane of the cell (3) is created spaced from its support edge. The edge of the cell membrane surrounding the opening, adhering to the support area (5), thus seals off the cell fluid situated in the interior of the cell (3) from the culture medium (2) and insulates the cell fluid against the culture medium (2). The interior of the cell (3) is manipulated through the opening. An apparatus for implementing the process is also provided, including an object carrier (4) with a support area (5) for adhering the cell and a poration tool (6) for creating the opening in the cell membrane. The poration tool (6) may be any of various chemical, mechanical and/or electrical devices.Type: GrantFiled: May 27, 1999Date of Patent: November 5, 2002Assignee: Micronas GmbHInventors: Werner Baumann, Ralf Ehret, Mirko Lehmann, Günter Igel, Hans-Jürgen Gahle, Bernhard Wolf, Ulrich Sieben, Ingo Freund, Martin Brischwein
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Patent number: 6471838Abstract: A measuring device (1), for examining a medium (2) that is liquid or free-flowing, has at least two electrically and/or optically conducting layers or layer areas (5a, 5b, 5c, 6a, 6b, 7a, 7b) located on a substrate layer (3), wherein these layers or layer areas are electrically and/or optically insulated from each other. At least one of these layers or layer areas (5a, 5b, 5c, 6a, 6b, 7a, 7b) is part of a layer stack (4), which has several layers arranged on top of each other on the substrate layer (3). The layer stack has, on its side facing away from the substrate layer (3), a recess that adjoins the electrically and/or optically conducting layers or layer areas (5a, 5b, 6a, 6b, 7a, 7b). At least one electrically and/or optically conducting layer or layer area (5a, 5b, 6a, 6b, 7a, 7b) located in the layer stack (4) is spaced at a distance from the bottom (11) of the recess (10).Type: GrantFiled: February 18, 2000Date of Patent: October 29, 2002Assignee: Micronas GmbHInventors: Günter Igel, Hans-Jürgen Gahle, Mirko Lehmann
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Publication number: 20020110847Abstract: A method is provided for measuring a state variable of a biological cell (3) located in a nutrient medium (2) and supported on and adhering to a support area (5). Within the support area (5) for the cell (3) and at a distance from the support area edge, an opening is made in the membrane of the cell (3). The edge of the cell membrane that surrounds the opening and adheres to the support area (5) seals off the liquid found inside the cell (3) from the nutrient medium (2). Through the opening the state variable (2) is measured. An apparatus for performing the method is also provided.Type: ApplicationFiled: April 9, 2002Publication date: August 15, 2002Applicant: Micronas GmbHInventors: Werner Baumann, Ralf Ehret, Mirko Lehmann, Gunter Igel, Hans-Jurgen Gahle, Berhard Wolf, Ulrich Sieben, Ingo Freund, Martin Brischwein
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Patent number: 6368851Abstract: A method is provided for measuring a state variable of a biological cell (3) located in a nutrient medium (2) and supported on and adhering to a support area (5). Within the support area (5) for the cell (3) and at a distance from the support area edge, an opening is made in the membrane of the cell (3). The edge of the cell membrane that surrounds the opening and adheres to the support area (5) seals off the liquid found inside the cell (3) from the nutrient medium (2). Through the opening the state variable (2) is measured. An apparatus for performing the method is also provided.Type: GrantFiled: May 27, 1999Date of Patent: April 9, 2002Assignee: Micronas GmbHInventors: Werner Baumann, Ralf Ehret, Mirko Lehmann, Günter Igel, Hans-Jürgen Gahle, Bernhard Wolf, Ulrich Sieben, Ingo Freund, Martin Brischwein
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Patent number: 6346675Abstract: A coupling (1) has a coupling receiver (2) and a coupling counterpart (3) connectable with it, which in the coupling position is held in a receiver depression (6) of the coupling receiver. The receiver depression (6) is arranged in a layer stack (4) with at least two layers (5a, 5b, 5c, 5d, 5e). Proceeding from the flat surface of the layer stack (4) bordering upon the recess depression (6) to the interior of the receiver depression (6), the lateral boundary wall of the recess depression (6) has at least one cutback, which is formed by a receding layer (5a, 5c) or a receding layer area. The coupling counterpart (3) has at least one lateral guide and/or locking projection (9a, 9b), which engages into a cutback (8a, 8b) of the component (2) in the coupling position.Type: GrantFiled: February 18, 2000Date of Patent: February 12, 2002Assignee: Micronas GmbHInventors: Günter Igel, Hans-Jürgen Gahle, Mirko Lehmann
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Patent number: 6288440Abstract: A chip arrangement (1) has a substrate board (2) with an opening (3), into which a carrier chip (4) is inserted, which has an electrical or electronic structural component (5). At least one conductor path (7) is integrated into the carrier chip (4), which connects the structural component (5) to the electrical connection contact (8). The carrier chip (4) is inserted into the opening (3) in such a way that its ends project beyond the opposite-facing, flat-sided surfaces (9, 9′) of the substrate board (2), and thereby form overhangs (10, 10′). Here, the structural component is arranged on the overhang (10) projecting beyond the one surface (9), and the connection contact (8) is arranged on the overhang (10′) projecting beyond the other surface (9′), and the conductor path (7) connecting the structural component (5) and the connection contact (8) passes through the opening (3). A seal is arranged between the substrate board (2) and the carrier chip (4).Type: GrantFiled: June 29, 1999Date of Patent: September 11, 2001Assignee: Micronas GmbHInventors: Ulrich Sieben, Günter Igel, Mirko Lehmann, Hans-Jürgen Gahle, Bernhard Wolf, Werner Baumann, Ralf Ehret
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Patent number: 6191489Abstract: A process is provided for manufacturing a layer arrangement (1) having a bump for a flip chip or similar connection. The layer arrangement has a plurality of layers (2, 3, 4, 5, 6, 7, 11) made of solid material and stacked into a layer stack (8). A recess (10) that extends over several layers (2, 3, 4, 5, 6, 7, 11) is made in the layer stack (8) transverse to the coating planes of the layers (2, 3, 4, 5, 6, 7, 11). A bump material (14) is placed in the recess (10). A profiling is created on the lateral boundary wall of the recess (10) by removal of layer material of different layers (2, 3, 4, 5, 6, 7, 11) of the layer stack (8). The profiling, starting from the surface (9) of the layer stack (8) and progressing in layers to the inside of the recess (10), has at least two indentations (12) and at least one projection (13) located between them. After the production of the profiling, a bump material (14) is brought into the recess (10) in such a way that it grasps behind the indentations (12).Type: GrantFiled: February 18, 2000Date of Patent: February 20, 2001Assignee: Micronas GmbHInventors: Günter Igel, Hans-Jürgen Gahle, Mirko Lehmann
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Patent number: 6017775Abstract: The invention relates to a process for manufacturing a sensor with a metal electrode in an MOS structure. During the MOS process, a sensing region with a structure for the metal electrode is formed, this structure being made of a material having predetermined adhesion properties for metals, the sensing region being uncovered by etching the passivating layer, and a metallization of the surface of the MOS structure being carried out in which the metal layer adheres only to the structure for the metal electrode.Type: GrantFiled: October 9, 1997Date of Patent: January 25, 2000Assignee: Micronas Intermetall GmbHInventors: Guenter Igel, Hans-Jurgen Gahle
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Patent number: 4922140Abstract: A CMOS/NMOS integrated circuit realizes individual logic circuits with a combination of CMOS and enhancement-mode NMOS devices. The parameters of the CMOS and NMOS devices are selected such that the supply voltage dependency of the CMOS devices is offset by the supply voltage dependency of the NMOS devices. Thus, the propagation delays in the CMOS and NMOS devices, individually a function of supply voltage, remain constant for variations in the supply voltage. The logic circuits include analog-to-digital converters, adders, multipliers, flip flops and ring oscillators. The ring oscillator includes two blocks of inverters. The first block comprises CMOS inverters connected in series; the second block comprises enhancement-mode NMOS inverters connected in series. The output of the first block is connected to the input of the second block, and the output of the second block is connected to the input of the first block, thus forming a "ring" of inverters.Type: GrantFiled: March 17, 1989Date of Patent: May 1, 1990Assignee: Deutsche ITT Industries GmbHInventors: Hans-Jurgen Gahle, Arnold Uhlenhoff
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Patent number: 4456488Abstract: A method is disclosed for fabricating a monolithic integrated planar transistor whose emitter region (1) is diffused into the base region (3) on one surface side of a semiconductor wafer (2), which base region is diffused into the collector region (4). To achieve particularly small transistor structures with high cutoff frequencies, after the diffusion of the collector region (4), the impurities of the base region (3) and those of the emitter region (1) are introduced into the surface of the collector region (4) by masked ion implantation, and the implanted ions are then activated in a single tempering process, during which the base region (3) and the emitter region (1) are formed below a protective insulating layer (5) which remains on the semiconductor surface. In the protective insulating layer, windows are formed for depositing the contacts (6, 7, 8) of the collector region (4), the base region (3), and the emitter region (1).Type: GrantFiled: March 31, 1982Date of Patent: June 26, 1984Assignee: ITT Industries, Inc.Inventor: Hans-Jurgen Gahle