Abstract: A method and system are disclosed. The method may include receiving instructions in a hardware accelerator coupled to a computing device. The instructions may describe operations and data dependencies between the operations. The operations and the data dependencies may be predetermined. The method may include performing a splitter operation in the hardware accelerator, performing an operation in each of a plurality of branches, and performing a combiner operation in the hardware accelerator.

Abstract: A method and system are disclosed. The method may include receiving instructions in a hardware accelerator coupled to a computing device. The instructions may describe operations and data dependencies between the operations. The operations and the data dependencies may be predetermined. The method may include performing a splitter operation in the hardware accelerator, performing an operation in each of a plurality of branches, and performing a combiner operation in the hardware accelerator.

Abstract: An integrated circuit comprises a CPU, ports for external communication, a memory means and a switching means for converting the circuit between a working mode and an initiating mode. The circuit is in itself, in the initiating mode, adapted to receive an initiating signal, comprising external instructions, and to bring the CPU to execute said instructions.

Abstract: An integrated circuit comprises a CPU, ports for external communication, a memory means and a switching means for converting the circuit between a working mode and an initiating mode. The circuit is in itself, in the initiating mode, adapted to receive an initiating signal, comprising external instructions, and to bring the CPU to execute said instructions. According to a method for bringing the integrated circuit to execute instructions, the integrated circuit is in a first step brought into the initiating mode. Thereafter the circuit receives said external signal and uses the integrated CPU to execute said instructions.

Abstract: In-code context data used for exception handling is incorporated into a special call instruction which is recognized by the processor. The information is skipped at the time of the function call and read at the time of the stack unwinding. This special call instruction may be implemented to run at no extra cycle costs compared to normal instructions, except for the external execution time dependencies from such machinery as a cache involved in the instruction fetching, since it would never be necessary during normal execution to actually access the information. The information is only accessed during exception handling.