Abstract: Systems and methods are provided for calculating, using an electronic processor, an average environmental brightness and determining a current pulse width modulation (“PWM”) output level provided to the light source. The method also includes determining, using the electronic processor, a target illumination level and a PWM adjustment rate. The PWM adjustment rate is based at least partially on the calculated average environmental brightness. The method also includes adjusting, using the electronic processor, the current PWM output level at the determined PWM adjustment rate to reach the target illumination level, and transmitting the adjusted PWM output level to the light source. The target illumination level is determined as a function of the current PWM output level and an output mode of the light source.

Abstract: A method of fabricating a vertical fin-based field effect transistor (FET) includes providing a semiconductor substrate having a first surface and a second surface, the semiconductor substrate having a first conductivity type, epitaxially growing a first semiconductor layer on the first surface of the semiconductor substrate, the first semiconductor layer having the first conductivity type and including a drift layer and a graded doping layer on the drift layer, and epitaxially growing a second semiconductor layer having the first conductivity type on the graded doping layer. The method also includes forming a metal compound layer on the second semiconductor layer, forming a patterned hard mask layer on the metal compound layer, and etching the metal compound layer and the second semiconductor layer using the patterned hard mask layer as a mask exposing a surface of the graded doping layer to form a plurality of fins surrounded by a trench.

Abstract: A portable lighting device includes a housing, a light source supported by the housing, and an alkaline battery positioned within the housing and coupled to the light source. The alkaline battery is configured to provide a drive current to the light source, and an intensity of the light source is dependent on the drive current. The portable lighting device also includes an electronic processor positioned within the housing and coupled to the light source and the alkaline battery. The electronic processor is configured to monitor a voltage of the alkaline battery, and execute a ramp-up algorithm to control the drive current based on the voltage of the alkaline battery.

Abstract: A method for manufacturing a vertical JFET includes providing a III-nitride substrate having a first conductivity type and forming a first III-nitride layer coupled to the III-nitride substrate. The first III-nitride layer is characterized by a first dopant concentration and the first conductivity type. The method also includes forming a plurality of trenches within the first III-nitride layer and epitaxially regrowing a second III-nitride structure in the trenches. The second III-nitride structure is characterized by a second conductivity type. The method further includes forming a plurality of III-nitride fins, each coupled to the first III-nitride layer, wherein the plurality of III-nitride fins are separated by one of a plurality of recess regions, and epitaxially regrowing a III-nitride gate layer in the recess regions. The III-nitride gate layer is coupled to the second III-nitride structure and the III-nitride gate layer is characterized by the second conductivity type.

Abstract: A portable lighting device includes a housing, a light source supported by the housing, and an alkaline battery positioned within the housing and coupled to the light source. The alkaline battery is configured to provide a drive current to the light source, and an intensity of the light source is dependent on the drive current. The portable lighting device also includes an electronic processor positioned within the housing and coupled to the light source and the alkaline battery. The electronic processor is configured to monitor a voltage of the alkaline battery, and execute a ramp-up algorithm to control the drive current based on the voltage of the alkaline battery.

Abstract: A method for manufacturing a vertical JFET includes providing a III-nitride substrate having a first conductivity type; forming a first III-nitride layer coupled to the III-nitride substrate, wherein the first III-nitride layer is characterized by a first dopant concentration and the first conductivity type; forming a plurality of trenches within the first III-nitride layer, wherein the plurality of trenches extend to a predetermined depth; epitaxially regrowing a second III-nitride structure in the trenches, wherein the second III-nitride structure is characterized by a second conductivity type; forming a plurality of III-nitride fins, each coupled to the first III-nitride layer, wherein the plurality of III-nitride fins are separated by one of a plurality of recess regions; epitaxially regrowing a III-nitride gate layer in the recess regions, wherein the III-nitride gate layer is coupled to the second III-nitride structure, and wherein the III-nitride gate layer is characterized by the second conductivity t

Abstract: A method for regulating an unmanned aerial vehicle (UAV) includes receiving a UAV identifier and one or more types of contextual information broadcasted by the UAV. The UAV identifier uniquely identifies the UAV from other UAVs. The one or more types of contextual information includes at least geographical information of the UAV. The method further includes authenticating, via an authentication device, an identity of the UAV based on the UAV identifier to determine whether the UAV is authorized for operation, and transmitting a signal to a remote device in response to determining whether the UAV is authorized for operation.

Abstract: A III-N-based vertical transistor includes a III-N substrate, a source, a drain, and a channel comprising a III-N crystal material and extending between the source and the drain. The channel includes at least one sidewall surface aligned ±0.3° with respect to an m-plane of the III-N crystal material. The III-N-based vertical transistor also includes a gate electrically coupled to the at least one sidewall surface of the channel.

Abstract: A vertical, fin-based field effect transistor (FinFET) device includes an array of individual FinFET cells. The array includes a plurality of rows and columns of separated fins. Each of the separated fins is in electrical communication with a source contact. The vertical FinFET device also includes one or more rows of first inactive fins disposed on a first set of sides of the array of individual FinFET cells, one or more columns of second inactive fins disposed on a second set of sides of the array of individual FinFET cells, and a gate region surrounding the individual FinFET cells of the array of individual FinFET cells, the first inactive fins, and the second inactive fins.

Abstract: A method of fabricating a vertical fin-based field effect transistor (FET) includes providing a semiconductor substrate having a first surface and a second surface, the semiconductor substrate having a first conductivity type, epitaxially growing a first semiconductor layer on the first surface of the semiconductor substrate, the first semiconductor layer having the first conductivity type and including a drift layer and a graded doping layer on the drift layer, and epitaxially growing a second semiconductor layer having the first conductivity type on the graded doping layer. The method also includes forming a metal compound layer on the second semiconductor layer, forming a patterned hard mask layer on the metal compound layer, and etching the metal compound layer and the second semiconductor layer using the patterned hard mask layer as a mask exposing a surface of the graded doping layer to form a plurality of fins surrounded by a trench.

Abstract: A vertical FET device includes a semiconductor structure comprising a semiconductor substrate, a first semiconductor layer coupled to the semiconductor substrate, and a second semiconductor layer coupled to the first semiconductor layer. The vertical FET device also includes a plurality of fins. Adjacent fins of the plurality of fins are separated by a trench extending into the second semiconductor layer and each of the plurality of fins includes a channel region disposed in the second semiconductor layer. The vertical FET also includes a gate region extending into a sidewall portion of the channel region of each of the plurality of fins, a source metal structure coupled to the second semiconductor layer, a gate metal structure coupled to the gate region, and a drain contact coupled to the semiconductor substrate.

Abstract: A semiconductor device includes an active device region and a plurality of guard rings arranged in a first concentric pattern surrounding the active device region. The semiconductor device also includes a plurality of junctions arranged in a second concentric pattern surrounding the active device region. At least one of the plurality of junctions is arranged between two adjacent guard rings of the plurality of guard rings, and the plurality of junctions have a different resistivity than the plurality of guard rings. The semiconductor device further includes a plurality of coupling paths. At least one of the plurality of coupling paths is arranged to connect two adjacent guard rings of the plurality of guard rings.

Abstract: The disclosure concerns methods for making a composition comprising a light metal and an intermetallic comprising the light metal and a light rare earth element. The composition also may include a plurality of nanoparticles comprising an oxide of the light metal. The method includes directly reducing a light rare earth element precursor compound in a melt of the light metal, thereby forming the light rare earth element and nanoparticles of the light metal oxide.

Abstract: Systems and methods for UAV safety are provided. An authentication system may be used to confirm UAV and/or user identity and provide secured communications between users and UAVs. The UAVs may operate in accordance with a set of flight regulations. The set of flight regulations may be associated with a geo-fencing device in the vicinity of the UAV.

Abstract: A transistor includes a substrate having a first surface and a second surface opposite the first surface, a drift region having a doped region on the first surface of the substrate and a graded doping region on the doped region, a semiconductor fin protruding from the graded doping region and comprising a metal compound layer at an upper portion of the semiconductor fin, a source metal contact on the metal compound layer, a gate layer having a bottom portion directly contacting the graded doping region; and a drain metal contact on the second surface of the substrate.

Abstract: A method for manufacturing a vertical FET device includes providing a semiconductor substrate structure including a semiconductor substrate and a first semiconductor layer coupled to the semiconductor substrate. The first semiconductor layer is characterized by a first conductivity type. The method also includes forming a plurality of semiconductor fins coupled to the first semiconductor layer. Each of the plurality of semiconductor fins is separated by one of a plurality of recess regions. The method further includes epitaxially regrowing a semiconductor gate layer including a surface region in the plurality of recess regions. The method also includes forming an isolation region within the surface region of the semiconductor gate layer. The isolation region surrounds each of the plurality of semiconductor fins. The method includes forming a source contact structure coupled to each of the plurality of semiconductor fins and forming a gate contact structure coupled to the semiconductor gate layer.

Abstract: A method for manufacturing a vertical JFET includes providing a III-nitride substrate having a first conductivity type; forming a first III-nitride layer coupled to the III-nitride substrate, wherein the first III-nitride layer is characterized by a first dopant concentration and the first conductivity type; forming a plurality of trenches within the first III-nitride layer, wherein the plurality of trenches extend to a predetermined depth; epitaxially regrowing a second III-nitride structure in the trenches, wherein the second III-nitride structure is characterized by a second conductivity type; forming a plurality of III-nitride fins, each coupled to the first III-nitride layer, wherein the plurality of III-nitride fins are separated by one of a plurality of recess regions; epitaxially regrowing a III-nitride gate layer in the recess regions, wherein the III-nitride gate layer is coupled to the second III-nitride structure, and wherein the III-nitride gate layer is characterized by the second conductivity t

Abstract: An unmanned aerial vehicle (UAV) includes a sensor configured to detect an indicator of a geo-fencing device; and a flight controller configured to generate one or more signals that cause the UAV to operate in accordance with a set of flight regulations that are generated based on the detected indicator of the geo-fencing device.

Abstract: The disclosure concerns methods for making a composition comprising a light metal and an intermetallic comprising the light metal and a light rare earth element. The composition also may include a plurality of nanoparticles comprising an oxide of the light metal. The method includes directly reducing a light rare earth element precursor compound in a melt of the light metal, thereby forming the light rare earth element and nanoparticles of the light metal oxide.

Abstract: Disclosed are a video editing method and apparatus, a device and a readable-storage medium. The method includes: acquiring a first video, separating a first video signal of the first video and an audio signal of the first video, collecting a second video signal, and synthesizing the collected second video signal with the audio signal to obtain a second video, clipping the first video and the second video to obtain a plurality of first short videos and a plurality of second short videos respectively; and selecting, according to the audio signal, a first target short video and a second target short video from the multiple first short videos and the multiple second short videos, and stitching the first target short video and the second target short video.