Abstract: A method for forming a semiconductor device is provided. The method includes forming a plurality of first channel nanostructures and a plurality of second channel nanostructures in an n-type device region and a p-type device region of a substrate, respectively, and sequentially depositing a gate dielectric layer, an n-type work function metal layer, and a cap layer surrounding each of the first and second channel nanostructures. The cap layer merges in first spaces between adjacent first channel nanostructures and merges in second spaces between adjacent second channel nanostructures. The method further includes selectively removing the cap layer and the n-type work function metal layer in the p-type device region, and depositing a p-type work function metal layer over the cap layer in the n-type device region and the gate dielectric layer in the p-type device region. The p-type work function metal layer merges in the second spaces.

Abstract: In some embodiments, the present disclosure relates to an integrated chip. The integrated chip includes a first channel structure configured to transport charge carriers within a first transistor device and a first gate electrode layer wrapping around the first channel structure. A second channel structure is configured to transport charge carriers within a second transistor device. A second gate electrode layer wraps around the second channel structure. The second gate electrode layer continuously extends from around the second channel structure to cover the first gate electrode layer. A third channel structure is configured to transport charge carriers within a third transistor device. A third gate electrode layer wraps around the third channel structure. The third gate electrode layer continuously extends from around the third channel structure to cover the second gate electrode layer.

Abstract: A multi-die package on package includes a bottom package having a first device die and a second device die. A top package including a memory die is stacked on the bottom package.

Abstract: According to one example, a semiconductor device includes a substrate and a fin stack that includes a plurality of nanostructures, a gate device surrounding each of the nanostructures, and inner spacers along the gate device and between the nanostructures. A width of the inner spacers differs between different layers of the fin stack.

Abstract: A bonding tool includes a gas supply line that may extend directly between valves associated with one or more gas supply tanks and a processing chamber such that gas supply line is uninterrupted without any intervening valves or other types of structures that might otherwise cause a pressure buildup in the gas supply line between the processing chamber and the valves associated with the one or more gas supply tanks. The pressure in the gas supply line may be maintained at or near the pressure in the processing chamber so that gas provided to the processing chamber through the gas supply line does not cause a pressure imbalance in the processing chamber, which might otherwise cause early or premature contact between semiconductor substrates that are to be bonded in the processing chamber.

Abstract: Semiconductor structures and methods are provided. An exemplary method includes depositing a first conductive material layer over a substrate, patterning the first conductive material layer to form a first conductor plate over the substrate, forming a first high-K dielectric layer over the first conductor plate, forming a second high-K dielectric layer on the first high-K dielectric layer, forming a third high-K dielectric layer on the second high-K dielectric layer, and forming a second conductor plate over the third high-K dielectric layer and vertically overlapped with the first conductor plate, where a composition of the first high-K dielectric layer is the same as a composition of the third high-K dielectric layer and is different from a composition of the second high-K dielectric layer.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first metal layer over a substrate, forming a dielectric layer over the first metal layer. The method includes forming a trench in the dielectric layer, and performing a surface treatment process on a sidewall surface of the trench to form a hydrophobic layer. The hydrophobic layer is formed on a sidewall surface of the dielectric layer. The method further includes depositing a metal material in the trench and over the hydrophobic layer to form a via structure.

Abstract: An information processing method and apparatus, a terminal, and a storage medium. The information processing method comprises: determining first content in response to a first operation event of a first control in a first document (S11); and adding the first content to the first document on the basis of content information and type information of the first content (S12). The type information comprises first type information and/or second type information, the second type information having an association with the first type information. In the described method, first content can be added to a first document according to content information and type information of the first content, so as to distinguish different ways of adding the first content.

Abstract: In some embodiments, the present disclosure relates to an integrated chip structure. The integrated chip structure includes a substrate. A gate electrode is over the substrate and a spacer structure laterally surrounds the gate electrode. A conductive via is disposed on the gate electrode. A liner is arranged along one or more sidewalls of the spacer structure. The conductive via has a bottommost surface that has a larger width than a part of the conductive via that is laterally adjacent to one or more interior sidewalls of the liner.

Abstract: An image sensing device and a control device of an illumination device thereof are provided. The control device includes a control circuit, an operation circuit, and multiple driving signal generators. The control circuit generates multiple control signals. The operation circuit performs a logical operation on the control signals and an image capturing signal to generate multiple operation results. The driving signal generator respectively provides multiple driving signals to the illumination device according to the operation results, and the driving signals respectively have multiple different output powers.

Abstract: The disclosure provides a method for heat-treating a boron steel, which includes: carburizing a boron steel on a surface thereof to obtain a carburized boron steel; austenitizing the carburized boron steel at a temperature of 885-895° C. for 25-35 min, to obtain an austenitized boron steel; sequentially subjecting the austenitized boron steel to an oil quenching and a tempering, wherein the oil quenching is performed at a temperature of 55-65° C. for 29-31 min.

Abstract: Certain aspects of the present disclosure relate to wireless communications, and more particularly, to techniques for beam determination, multi-user transmission, and channel state variance information (CSVI) reporting in a holographic multiple input multiple output (MIMO) system.

Abstract: In some embodiments, an image sensor is provided. The image sensor includes a photodetector disposed in a semiconductor substrate. A wave guide filter having a substantially planar upper surface is disposed over the photodetector. The wave guide filter includes a light filter disposed in a light filter grid structure. The light filter includes a first material that is translucent and has a first refractive index. The light filter grid structure includes a second material that is translucent and has a second refractive index less than the first refractive index.

Abstract: The present disclosure provides a display device and a manufacturing method thereof. The display device includes a display module and a function module. The display module includes a first substrate and a plurality of light emitting units. The plurality of light emitting units are located on a side of the first substrate. A light emitting direction of the light emitting units are oriented towards the first substrate. The function module is located on a surface of the first substrate away from the light emitting units. The function module and the light emitting units share the first substrate. A surface of the function module close to the first substrate is in direct contact with the surface of the first substrate away from the light emitting units.

Abstract: This application provides a task migration system and method. The system includes a first terminal and a second terminal. The second terminal runs a first application. The first terminal opens a recent task interface after receiving a user operation, where the recent task interface includes an identifier of the second terminal; after receiving a user operation performed on the identifier of the second terminal, displays, in the recent task interface, at least one task card corresponding to an application run by the second terminal in the background; and after receiving a user operation performed on a first task card corresponding to the first application, runs the first application, and displays a first user interface of the first application.

Abstract: Methods, systems, and devices for wireless communications are described. A first device (e.g., a base station) may transmit reference signals to a second device (e.g., a user equipment (UE)) via transmitter antenna circles. The second device may receive and measure the reference signals via corresponding receiver antenna circles. Both the transmitter antenna circles and the in receiver antenna circles may include a center antenna circle and one or more peripheral antenna circles. The second device may transmit channel gain measurements to the first device based on measuring the reference signals. The first device may determine orbital angular momentum (OAM) modes, a power loading scheme, or both for the transmitter antenna circles based on the channel gain measurements. The first device may transmit OAM transmissions to the second device based on the determined OAM modes, the power loading scheme, or both. The OAM transmissions may have different OAM states, polarizations, or both.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first insulating layer over a substrate. A first metal feature is formed in the first insulating layer and a second insulating layer is formed over the first insulating layer. A first metal via is formed through the second insulating layer to connect the first metal feature. A second metal feature is formed over the second insulating layer. The second metal feature has a convex top surface and a plane bottom surface, and the plane bottom is electrically connected to the first metal feature through the first metal via.

Abstract: The federated learning system includes a moderator and client devices. Each client device performs a method for verifying model update as follows: receiving a hash function and a general model; training a client model according to the general model and raw data; calculating a difference as an update parameter between the general model and the client model, sending the update parameter to the moderator; inputting the update parameter to the hash function to generate a hash value; sending the hash value to other client devices, and receiving other hash values; summing all the hash values to generate a trust value; receiving an aggregation parameter calculated according to the update parameters; inputting the aggregation parameter to the hash function to generate a to-be-verified value; and updating the client model according to the aggregation parameter when the to-be-verified value equals the trust value.

Abstract: A transistor includes a first semiconductor layer, a second semiconductor layer, a semiconductor nanosheet, a gate electrode and source and drain electrodes. The semiconductor nanosheet is physically connected to the first semiconductor layer and the second semiconductor layer. The gate electrode wraps around the semiconductor nanosheet. The source and drain electrodes are disposed at opposite sides of the gate electrode. The first semiconductor layer surrounds the source electrode, the second semiconductor layer surrounds the drain electrode, and the semiconductor nanosheet is disposed between the source and drain electrodes.

Abstract: A foldable electronic device is provided and includes a central base, a torque module, two wing members, two transmission members, two panel bodies, two connecting rods, two drop plates, a synchronous module and a flexible screen. The torque module is disposed on the central base, the wing members pivot relative to the central base, the transmission members are pivotally connected to the torque module and the central base, the panel bodies pivot relative to the wing members and linearly slide relative to the transmission members, the connecting rods pivot relative to the wing members, the drop plates pivot relative to the panel bodies and the connecting rods, the synchronous module drives the transmission members to reverse synchronously, and the flexible screen is arranged on the panel bodies, the drop plates and the wing members and includes a bendable area.