Patents by Inventor Hao Liao

Hao Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240194669
    Abstract: A semiconductor device includes a compound semiconductor channel layer disposed on a substrate and located in an active element region and a passive element region. A compound semiconductor barrier layer is stacked on the compound semiconductor channel layer and located in the active element region and the passive element region. A source electrode, a gate electrode and a drain electrode are disposed on the compound semiconductor barrier layer and located in the active element region to construct a high electron mobility transistor. In addition, a first terminal electrode, an intermediate electrode and a second terminal electrode are disposed on the compound semiconductor barrier layer and located in the passive element region to construct a resistor.
    Type: Application
    Filed: December 8, 2022
    Publication date: June 13, 2024
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Chia-Hao Lee, Chih-Cherng Liao, Po-Heng Lin
  • Publication number: 20240194569
    Abstract: A package structure and method of forming the same are provided. The package structure includes a die, a through via, an encapsulant, an adhesion promoter layer, an insulating layer and a polymer layer. The through via is laterally aside the die. The encapsulant laterally encapsulates the die and the a through via. The adhesion promoter layer and an insulating layer are sandwiched between the a through via and the encapsulant. Sidewalls of the a through via are covered by the adhesion promoter layer and the insulating layer. The polymer layer is located under the through via and encapsulant. The insulating layer includes a plurality of portions.
    Type: Application
    Filed: February 21, 2024
    Publication date: June 13, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Chun Cho, Hung-Jui Kuo, Yu-Hsiang Hu, Sih-Hao Liao, Wei-Chih Chen
  • Publication number: 20240194593
    Abstract: A method of forming a semiconductor device includes the following operations. A substrate is provided with an electric component. A composite dielectric layer is formed on the substrate and covers the electric component. An opening is formed through the composite dielectric layer. A directional etching process is performed to widen an upper portion of the opening. A metal feature is formed in the opening.
    Type: Application
    Filed: February 10, 2023
    Publication date: June 13, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Wei Su, Yung-Hsu Wu, Hsin-Ping Chen, Chih Wei LU, Wei-Hao Liao, Hsi-Wen Tien, Cherng-Shiaw Tsai
  • Publication number: 20240194523
    Abstract: In some embodiments, the present disclosure relates to an integrated chip. The integrated chip includes an interconnect dielectric layer over a substrate. An interconnect via is within the interconnect dielectric layer, and an interconnect wire is over the interconnect via and within the interconnect dielectric layer. A protective layer surrounds the interconnect via. The interconnect via vertically extends through the protective layer to below a bottom of the protective layer. The protective layer continuously extends from along an outer sidewall of the interconnect via to along an outer sidewall of the interconnect wire in a first cross-sectional view.
    Type: Application
    Filed: February 21, 2024
    Publication date: June 13, 2024
    Inventors: Hsi-Wen Tien, Chung-Ju Lee, Chih Wei Lu, Hsin-Chieh Yao, Yu-Teng Dai, Wei-Hao Liao
  • Publication number: 20240192434
    Abstract: An anti-peep light source module and an anti-peep display device having an anti-peep function and good image quality are provided. The anti-peep light source module includes a light guide plate, a first light emitting element, a second light emitting element, a plurality of optical microstructures and a first surface. The light guide plate has a first light incident surface and a second light incident surface. Each of the optical microstructures has a first optical surface facing the first light incident surface and a second optical surface facing the second light incident surface. A magnitude of a first included angle between the first optical surface and the first surface and a magnitude of a second included angle between the second optical surface and the first surface gradually change as getting farther away from the first surface.
    Type: Application
    Filed: December 5, 2023
    Publication date: June 13, 2024
    Applicants: CHAMP VISION DISPLAY INC., Coretronic Corporation
    Inventors: Hsin-Hung Lee, Chung-Hao Wu, Chun-Chien Liao, Ming-Huei Shiu
  • Patent number: 12009226
    Abstract: A method includes attaching an integrated circuit die adjacent to a first substrate, the integrated circuit die comprising: an active device in a second substrate; a pad adjacent to the second substrate; and a first dielectric layer adjacent to the second substrate, the first dielectric layer comprising a polyimide with an ester group; forming an encapsulant around the integrated circuit die; and removing the first dielectric layer.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: June 11, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ting-Chen Tseng, Sih-Hao Liao, Yu-Hsiang Hu, Hung-Jui Kuo
  • Patent number: 12009331
    Abstract: In an embodiment, a device includes: a semiconductor die including a semiconductor material; a through via adjacent the semiconductor die, the through via including a metal; an encapsulant around the through via and the semiconductor die, the encapsulant including a polymer resin; and an adhesion layer between the encapsulant and the through via, the adhesion layer including an adhesive compound having an aromatic compound and an amino group, the amino group bonded to the polymer resin of the encapsulant, the aromatic compound bonded to the metal of the through via, the aromatic compound being chemically inert to the semiconductor material of the semiconductor die.
    Type: Grant
    Filed: June 7, 2023
    Date of Patent: June 11, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hung-Chun Cho, Sih-Hao Liao, Yu-Hsiang Hu, Hung-Jui Kuo
  • Patent number: 12009400
    Abstract: A method includes forming a dielectric layer on a semiconductor workpiece, forming a first patterned layer of a first dipole material on the dielectric layer, and performing a first thermal drive-in operation at a first temperature to form a diffusion feature in a first portion of the dielectric layer beneath the first patterned layer. The method also includes forming a second patterned layer of a second dipole material, where a first section of the second patterned layer is on the diffusion feature and a second section of the second patterned layer is offset from the diffusion feature. The method further includes performing a second thermal drive-in operation at a second temperature, where the second temperature is less than the first temperature. The method additionally includes forming a gate electrode layer on the dielectric layer.
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: June 11, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yung-Hsiang Chan, Shan-Mei Liao, Wen-Hung Huang, Jian-Hao Chen, Kuo-Feng Yu, Mei-Yun Wang
  • Publication number: 20240186283
    Abstract: An integrated fan-out (InFO) package includes a die, an encapsulant laterally encapsulating the die, and a redistribution structure. The redistribution structure is disposed on the encapsulant. The redistribution structure includes a plurality of routing patterns and a plurality of alignment marks. The routing patterns are electrically connected to the die. The alignment marks surround the routing patterns. The alignment marks are electrically insulated from the die and the routing patterns. At least one of the alignment marks is in physical contact with the encapsulant, and the alignment marks located at different level heights are arranged in a non-overlapping manner vertically.
    Type: Application
    Filed: December 26, 2023
    Publication date: June 6, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jhih-Yu Wang, Hung-Jui Kuo, Yu-Hsiang Hu, Sih-Hao Liao, Yung-Chi Chu
  • Publication number: 20240186188
    Abstract: A semiconductor device includes a first semiconductor layer below a second semiconductor layer; first and second gate dielectric layers surrounding the first and the second semiconductor layers, respectively; and a gate electrode surrounding both the first and the second gate dielectric layers. The first gate dielectric layer has a first top section above the first semiconductor layer and a first bottom section below the first semiconductor layer. The second gate dielectric layer has a second top section above the second semiconductor layer and a second bottom section below the second semiconductor layer. The first top section has a first thickness. The second top section has a second thickness. The second thickness is greater than the first thickness.
    Type: Application
    Filed: February 14, 2024
    Publication date: June 6, 2024
    Inventors: Yung-Hsiang CHAN, Wen-Hung HUANG, Shan-Mei LIAO, Jian-Hao CHEN, Kuo-Feng YU, Kuei-Lun LIN
  • Patent number: 12003922
    Abstract: A speaker comprises a housing, a transducer residing inside the housing, and at least one sound guiding hole located on the housing. The transducer generates vibrations. The vibrations produce a sound wave inside the housing and cause a leaked sound wave spreading outside the housing from a portion of the housing. The at least one sound guiding hole guides the sound wave inside the housing through the at least one sound guiding hole to an outside of the housing. The guided sound wave interferes with the leaked sound wave in a target region. The interference at a specific frequency relates to a distance between the at least one sound guiding hole and the portion of the housing.
    Type: Grant
    Filed: July 7, 2023
    Date of Patent: June 4, 2024
    Assignee: SHENZHEN SHOKZ CO., LTD.
    Inventors: Xin Qi, Fengyun Liao, Jinbo Zheng, Qian Chen, Hao Chen
  • Publication number: 20240176880
    Abstract: A malware family identification engine constructs a graph data structure of direct relationships between malware instances and malware families, direct relationships between malware instances and detected tags, and indirect relationships between detected tags and malware families. The engine builds a dictionary data structure comprising detected tag entries linking each detected tag to one or more malware family nodes based on the graph data structure. The engine identifies significant indirect entities (SIEs) within the detected tag entries of the dictionary data structure and selects a SIE with a highest number of out-going links (OGLs) as a root node in a family tree data structure, recursively connects SIEs with a number of OGLs less than the highest number of OGLs to the root node in the family tree data structure, and converts each SIE name in the family tree data structure to a chained family entity name in the family tree data structure.
    Type: Application
    Filed: December 12, 2023
    Publication date: May 30, 2024
    Inventors: Yu-Siang Chen, Ci-Hao Wu, Ying-Chen Yu, Pao-Chuan Liao, June-Ray Lin
  • Publication number: 20240179621
    Abstract: In a network comprising a plurality of macro base stations, a plurality of micro base stations and a plurality of user devices (UEs), a method of establishing a wireless communication network includes: assigning the micro base stations into a plurality of clusters and selecting a micro base station from each of the clusters as a cluster head; receiving, from cluster heads of the clusters by the network device, information about candidate sub-clusters determined by UEs, each of the candidate sub-clusters comprises micro base stations whose signal power received at a UE exceeds a pre-defined threshold; identifying at least two schemes of grouping the micro base stations into non-overlapping sub-clusters based on the candidate sub-clusters; for a scheme of the at least two schemes, making each of the UEs select to access a macro base station or to be associated with one of the non-overlapping sub-clusters of the scheme base on respective measurements of signals received from at least one of a macro base station
    Type: Application
    Filed: November 18, 2022
    Publication date: May 30, 2024
    Inventors: Xiqing LIU, Mugen PENG, Yuwei LIAO, Dixiang GAO, Hao WEI, Shi YAN
  • Publication number: 20240178961
    Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may be a first wireless device. The first wireless device receives, from a base station, a configuration of first reference signals on a first time-frequency resource. The first wireless device measures the first reference signals received from the base station to obtain first measurements for a direct path between the base station and the first wireless device. The first wireless device obtains second measurements for an indirect path between the base station and the first wireless device via a second wireless device. The first wireless device selects a communication path from the direct path and the indirect path based at least in part on the first measurements and the second measurements.
    Type: Application
    Filed: November 17, 2023
    Publication date: May 30, 2024
    Inventors: Lung-Sheng Tsai, Chun-Hao Fang, Wei-Kai Chang, Chia-Hao Yu, Pei-Kai Liao
  • Publication number: 20240174693
    Abstract: The invention discloses a nitrogen-containing heterocyclic derivative of a somatostatin receptor subtype 4 (SSTR4) small molecule agonist and its pharmaceutical composition, preparation method, and use. The nitrogen-containing heterocyclic derivative of the SSTR4 small molecule agonist is represented by formula (I), and the specific substituents and definitions are as described in the specification. The nitrogen-containing heterocyclic derivatives of SSTR4 small molecule agonists exhibit good binding and agonistic activities with SSTR4. Such compounds or their pharmaceutical compositions have great potential in treating and/or preventing pain disorders related to SSTR4 receptor.
    Type: Application
    Filed: November 7, 2023
    Publication date: May 30, 2024
    Inventors: Shuo Zhao, Subo Liao, Ming Li, Jun Yang, Hao Zhou, Zejian Ding, Xin Zheng, Youjian Ning, Dali Liang, Rong Liu, Zewen Liu
  • Publication number: 20240177319
    Abstract: Many unsupervised domain adaptation (UDA) methods have been proposed to bridge the domain gap by utilizing domain invariant information. Most approaches have chosen depth as such information and achieved remarkable successes. Despite their effectiveness, using depth as domain invariant information in UDA tasks may lead to multiple issues, such as excessively high extraction costs and difficulties in achieving a reliable prediction quality. As a result, we introduce Edge Learning based Domain Adaptation (ELDA), a framework which incorporates edge information into its training process to serve as a type of domain invariant information. Our experiments quantitatively and qualitatively demonstrate that the incorporation of edge information is indeed beneficial and effective, and enables ELDA to outperform the contemporary state-of-the-art methods on two commonly adopted benchmarks for semantic segmentation based UDA tasks.
    Type: Application
    Filed: November 24, 2023
    Publication date: May 30, 2024
    Applicant: MEDIATEK INC.
    Inventors: Ting-Hsuan Liao, Huang-Ru Liao, Shan-Ya Yang, Jie-En Yao, Li-Yuan Tsao, Hsu-Shen Liu, Bo-Wun Cheng, Chen-Hao Chao, Chia-Che Chang, Yi-Chen Lo, Chun-Yi Lee
  • Patent number: 11996332
    Abstract: A semiconductor device includes a semiconductor substrate, a first semiconductor stack, a second semiconductor stack, a first gate structure, and a second gate structure. The semiconductor substrate comprising a first device region and a second device region. The first semiconductor stack is located on the semiconductor substrate over the first device region, and has first channels. The second semiconductor stack is located on the semiconductor substrate over the second device region, and has second channels. A total number of the first channels is greater than a total number of the second channels. The first gate structure encloses the first semiconductor stack. The second gate structure encloses the second semiconductor stack.
    Type: Grant
    Filed: March 8, 2023
    Date of Patent: May 28, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan-Ting Pan, Chih-Hao Wang, Kuo-Cheng Chiang, Yi-Bo Liao, Yi-Ruei Jhan
  • Publication number: 20240172083
    Abstract: A first wireless device receives, from a base station, a configuration of first reference signals to be transmitted on a first time-frequency resource and a configuration of second reference signals to be transmitted on a second time-frequency resource. The first wireless device measures one of the first reference signals and the second reference signals. The first wireless device switches to measuring the other one of the second reference signals, wherein the first reference signals are measured to generate first measurements and the second reference signals are measured to generate second measurements. The first wireless device obtains a selection of a communication path, for communicating data between the base station and the first wireless device. The first wireless device obtains a first radio frequency (RF) signal from one or more RF signals carried through the communication path.
    Type: Application
    Filed: November 17, 2023
    Publication date: May 23, 2024
    Inventors: Lung-Sheng Tsai, Chun-Hao Fang, Wei-Kai Chang, Chia-Hao Yu, Pei-Kai Liao
  • Publication number: 20240172258
    Abstract: A first wireless device reports to a base station at least one of (a) a capability of the first wireless device for path selection or path combining and (b) a supported frequency range on the second time-frequency resource. The first wireless device receives, from the base station, first control information indicating whether the first wireless device should receive data on the first time-frequency resource from the base station, on the second time-frequency resource from the second device, or both the first and second time-frequency resources, wherein the data are transmitted from the base station on the first time-frequency resource. The first wireless device receives the data based on the first control information.
    Type: Application
    Filed: November 17, 2023
    Publication date: May 23, 2024
    Inventors: Lung-Sheng Tsai, Chun-Hao Fang, Wei-Kai Chang, Chia-Hao Yu, Pei-Kai Liao
  • Patent number: 11991500
    Abstract: A speaker comprises a housing, a transducer residing inside the housing, and at least one sound guiding hole located on the housing. The transducer generates vibrations. The vibrations produce a sound wave inside the housing and cause a leaked sound wave spreading outside the housing from a portion of the housing. The at least one sound guiding hole guides the sound wave inside the housing through the at least one sound guiding hole to an outside of the housing. The guided sound wave interferes with the leaked sound wave in a target region. The interference at a specific frequency relates to a distance between the at least one sound guiding hole and the portion of the housing.
    Type: Grant
    Filed: April 23, 2023
    Date of Patent: May 21, 2024
    Assignee: SHENZHEN SHOKZ CO., LTD.
    Inventors: Xin Qi, Fengyun Liao, Jinbo Zheng, Qian Chen, Hao Chen